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Subject: Re: [Qemu-devel] [PATCH v2 5/8] apic: do not accept SIPI on the
 bootstrap processor
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To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Cc: Igor Mammedov <imammedo@redhat.com>, "Michael S. Tsirkin" <mst@redhat.com>

Am 02.05.2014 16:33, schrieb Paolo Bonzini:
> SIPI interrupts are ignored on the bootstrap.  Never accept one.
>=20
> Cc: Andreas F=C3=A4rber <afaerber@suse.de>
> Cc: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  hw/intc/apic_common.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
> index 7ecce2d..05c0e08 100644
> --- a/hw/intc/apic_common.c
> +++ b/hw/intc/apic_common.c
> @@ -200,7 +200,7 @@ void apic_init_reset(DeviceState *dev)
>      s->initial_count =3D 0;
>      s->initial_count_load_time =3D 0;
>      s->next_time =3D 0;
> -    s->wait_for_sipi =3D 1;
> +    s->wait_for_sipi =3D !cpu_is_bsp(s->cpu);

I wondered whether this will work on hot-add. I believe so, since the
device is reset on realized=3Dtrue after executing the realize hook, and
the APIC gets realized as part of the CPU (but before it's reset).

Reviewed-by: Andreas F=C3=A4rber <afaerber@suse.de>

Andreas

> =20
>      if (s->timer) {
>          timer_del(s->timer);

--=20
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