From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37975) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wjkxm-0007SH-MD for qemu-devel@nongnu.org; Mon, 12 May 2014 03:48:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wjkxd-000269-N4 for qemu-devel@nongnu.org; Mon, 12 May 2014 03:47:54 -0400 Message-ID: <53707C9E.7000205@suse.de> Date: Mon, 12 May 2014 09:47:42 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1399041202-26184-1-git-send-email-pbonzini@redhat.com> <1399041202-26184-7-git-send-email-pbonzini@redhat.com> In-Reply-To: <1399041202-26184-7-git-send-email-pbonzini@redhat.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini , qemu-devel@nongnu.org Cc: Peter Maydell , Alexander Graf , Christian Borntraeger , qemu-ppc , Anthony Liguori , Richard Henderson Am 02.05.2014 16:33, schrieb Paolo Bonzini: > On the x86, some devices need access to the CPU reset pin (INIT#). > Provide a generic service to do this, using one of the internal > cpu_interrupt targets. Generalize the PPC-specific code for > CPU_INTERRUPT_RESET to other targets. >=20 > Since PPC does not support migration across QEMU versions (its > machine types are not versioned yet), I picked the value that > is used on x86, CPU_INTERRUPT_TGT_INT_1. Consequently, TGT_INT_2 > and TGT_INT_3 are shifted down by one while keeping their value. >=20 > Reviewed-by: Anthony Liguori > Signed-off-by: Paolo Bonzini > --- > cpu-exec.c | 23 +++++++++++++---------- > cpus.c | 9 +++++++++ > include/exec/cpu-all.h | 8 +++++--- > include/sysemu/cpus.h | 1 + > target-i386/cpu.h | 7 ++++--- > target-ppc/cpu.h | 3 --- > 6 files changed, 32 insertions(+), 19 deletions(-) No objection from my side, but I thought there had been agreement among Anthony, Peter and others that soft-reset is nothing generic that can be implemented as API? s390x has multiple ways to do resets, same for ppc, and I thought the suggested way to implement them was a qemu_irq in the particular piece of hardware together with custom reset functions as done for s390x? CC'ing some more maintainers. IIRC Richard was against exposing target interrupt codes to generic code when I tried to clean up some header by moving things to qom/cpu.h. Regards, Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg