From: Alexander Graf <agraf@suse.de>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
Peter Maydell <peter.maydell@linaro.org>
Cc: "Rob Herring" <rob.herring@linaro.org>,
"Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
"John Williams" <john.williams@xilinx.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"QEMU Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v1 05/22] target-arm: Add arm_el_to_mmu_idx()
Date: Sat, 17 May 2014 00:13:06 +0200 [thread overview]
Message-ID: <53768D72.5080206@suse.de> (raw)
In-Reply-To: <20140516221045.GC18802@zapo.iiNet>
On 17.05.14 00:10, Edgar E. Iglesias wrote:
> On Fri, May 16, 2014 at 03:24:42PM +0100, Peter Maydell wrote:
>> On 6 May 2014 07:08, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
>>> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>>>
>>> Maps a given EL to the corresponding MMU index.
>>>
>>> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
>>> ---
>>> target-arm/cpu.h | 21 ++++++++++++++++++++-
>>> target-arm/translate-a64.c | 8 ++------
>>> 2 files changed, 22 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
>>> index ff86250..938f389 100644
>>> --- a/target-arm/cpu.h
>>> +++ b/target-arm/cpu.h
>>> @@ -1086,9 +1086,28 @@ static inline CPUARMState *cpu_init(const char *cpu_model)
>>> #define MMU_MODE0_SUFFIX _kernel
>>> #define MMU_MODE1_SUFFIX _user
>>> #define MMU_USER_IDX 1
>>> +static inline int arm_el_to_mmu_idx(int current_el)
>>> +{
>>> +#ifdef CONFIG_USER_ONLY
>>> + return MMU_USER_IDX;
>>> +#else
>>> + switch (current_el) {
>>> + case 0:
>>> + return MMU_USER_IDX;
>>> + case 1:
>>> + return 0;
>>> + default:
>>> + /* Unsupported EL. */
>>> + assert(0);
>>> + return 0;
>>> + }
>>> +#endif
>> Can we just make the EL and the MMU index the same thing,
>> or is secure-vs-nonsecure going to need its own MMU
>> indexes anyway?
> Right, I did the conversion to 1:1 mapping at an early stage
> but avoided it as we will need an indirect mapping for
> Secure EL0/1 anyway.
How often do we switch between secure and non-secure? If it doesn't
happen all that often, we could just flush the TLB on every transition.
Alex
next prev parent reply other threads:[~2014-05-16 22:13 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-06 6:08 [Qemu-devel] [PATCH v1 00/22] target-arm: Preparations for A64 EL2 and 3 Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 01/22] target-arm: A64: Add friendly logging of PSTATE A and I flags Edgar E. Iglesias
2014-05-07 5:32 ` Peter Crosthwaite
2014-05-07 8:50 ` Peter Maydell
2014-05-08 0:08 ` Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 02/22] target-arm: Make elr_el1 an array Edgar E. Iglesias
2014-05-07 5:10 ` Peter Crosthwaite
2014-05-08 0:13 ` Edgar E. Iglesias
2014-05-16 14:19 ` Peter Maydell
2014-05-16 22:19 ` Edgar E. Iglesias
2014-05-16 14:22 ` Peter Maydell
2014-05-16 22:18 ` Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 03/22] target-arm: Make esr_el1 " Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 04/22] target-arm: c12_vbar -> vbar_el[] Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 05/22] target-arm: Add arm_el_to_mmu_idx() Edgar E. Iglesias
2014-05-07 5:43 ` Peter Crosthwaite
2014-05-16 14:24 ` Peter Maydell
2014-05-16 22:10 ` Edgar E. Iglesias
2014-05-16 22:13 ` Alexander Graf [this message]
2014-05-17 1:41 ` Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 06/22] target-arm: Move get_mem_index to translate.h Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 07/22] target-arm: A64: Add SP entries for EL2 and 3 Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 08/22] target-arm: A64: Add ELR " Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 09/22] target-arm: Add SPSR entries for EL2/HYP and EL3/MON Edgar E. Iglesias
2014-05-07 5:31 ` Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 10/22] target-arm: A64: Introduce arm64_banked_spsr_index() Edgar E. Iglesias
2014-05-07 5:50 ` Peter Crosthwaite
2014-05-16 14:31 ` Peter Maydell
2014-05-17 2:21 ` Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 11/22] target-arm: Add a feature flag for EL2 Edgar E. Iglesias
2014-05-07 5:50 ` Peter Crosthwaite
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 12/22] target-arm: Add a feature flag for EL3 Edgar E. Iglesias
2014-05-07 5:51 ` Peter Crosthwaite
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 13/22] target-arm: Register EL2 versions of ELR and SPSR Edgar E. Iglesias
2014-05-07 6:02 ` Peter Crosthwaite
2014-05-16 14:36 ` Peter Maydell
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 14/22] target-arm: Register EL3 " Edgar E. Iglesias
2014-05-07 6:02 ` Peter Crosthwaite
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 15/22] target-arm: A64: Forbid ERET to increase the EL Edgar E. Iglesias
2014-05-07 6:03 ` Peter Crosthwaite
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 16/22] target-arm: A64: Forbid ERET to unimplemented ELs Edgar E. Iglesias
2014-05-07 6:04 ` Peter Crosthwaite
2014-05-07 9:00 ` Peter Maydell
2014-05-08 0:14 ` Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 17/22] target-arm: A64: Generalize ERET to various ELs Edgar E. Iglesias
2014-05-07 6:09 ` Peter Crosthwaite
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 18/22] target-arm: A64: Generalize update_spsel for the " Edgar E. Iglesias
2014-05-07 6:13 ` Peter Crosthwaite
2014-05-13 17:32 ` Richard Henderson
2014-05-14 1:18 ` Edgar E. Iglesias
2014-05-14 15:57 ` Richard Henderson
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 19/22] target-arm: Add storage for VBAR_EL2 and 3 Edgar E. Iglesias
2014-05-16 14:40 ` Peter Maydell
2014-05-17 1:42 ` Edgar E. Iglesias
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 20/22] target-arm: Make vbar_write writeback to any CPREG Edgar E. Iglesias
2014-05-07 6:19 ` Peter Crosthwaite
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 21/22] target-arm: A64: Register VBAR_EL2 Edgar E. Iglesias
2014-05-07 6:22 ` Peter Crosthwaite
2014-05-16 14:43 ` Peter Maydell
2014-05-06 6:08 ` [Qemu-devel] [PATCH v1 22/22] target-arm: A64: Register VBAR_EL3 Edgar E. Iglesias
2014-05-07 6:23 ` Peter Crosthwaite
2014-05-06 7:58 ` [Qemu-devel] [PATCH v1 00/22] target-arm: Preparations for A64 EL2 and 3 Peter Maydell
2014-05-07 3:46 ` Edgar E. Iglesias
2014-05-12 19:13 ` Aggeler Fabian
2014-05-12 20:39 ` Peter Maydell
2014-05-14 8:58 ` Aggeler Fabian
2014-05-14 13:55 ` Greg Bellows
2014-05-15 9:28 ` Aggeler Fabian
2014-05-15 9:45 ` Sergey Fedorov
2014-05-15 12:44 ` Christopher Covington
2014-05-14 14:56 ` Edgar E. Iglesias
2014-05-12 23:41 ` Peter Crosthwaite
2014-05-13 3:31 ` Edgar E. Iglesias
2014-05-06 8:24 ` Alexander Graf
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