From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60338) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WlQNR-0003IO-KO for qemu-devel@nongnu.org; Fri, 16 May 2014 18:13:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WlQNJ-0005Ye-GF for qemu-devel@nongnu.org; Fri, 16 May 2014 18:13:17 -0400 Received: from cantor2.suse.de ([195.135.220.15]:37397 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WlQNJ-0005YK-A6 for qemu-devel@nongnu.org; Fri, 16 May 2014 18:13:09 -0400 Message-ID: <53768D72.5080206@suse.de> Date: Sat, 17 May 2014 00:13:06 +0200 From: Alexander Graf MIME-Version: 1.0 References: <1399356506-5609-1-git-send-email-edgar.iglesias@gmail.com> <1399356506-5609-6-git-send-email-edgar.iglesias@gmail.com> <20140516221045.GC18802@zapo.iiNet> In-Reply-To: <20140516221045.GC18802@zapo.iiNet> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v1 05/22] target-arm: Add arm_el_to_mmu_idx() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Edgar E. Iglesias" , Peter Maydell Cc: Rob Herring , Peter Crosthwaite , John Williams , =?ISO-8859-1?Q?Alex_Benn=E9?= =?ISO-8859-1?Q?e?= , QEMU Developers On 17.05.14 00:10, Edgar E. Iglesias wrote: > On Fri, May 16, 2014 at 03:24:42PM +0100, Peter Maydell wrote: >> On 6 May 2014 07:08, Edgar E. Iglesias wrote: >>> From: "Edgar E. Iglesias" >>> >>> Maps a given EL to the corresponding MMU index. >>> >>> Signed-off-by: Edgar E. Iglesias >>> --- >>> target-arm/cpu.h | 21 ++++++++++++++++++++- >>> target-arm/translate-a64.c | 8 ++------ >>> 2 files changed, 22 insertions(+), 7 deletions(-) >>> >>> diff --git a/target-arm/cpu.h b/target-arm/cpu.h >>> index ff86250..938f389 100644 >>> --- a/target-arm/cpu.h >>> +++ b/target-arm/cpu.h >>> @@ -1086,9 +1086,28 @@ static inline CPUARMState *cpu_init(const char *cpu_model) >>> #define MMU_MODE0_SUFFIX _kernel >>> #define MMU_MODE1_SUFFIX _user >>> #define MMU_USER_IDX 1 >>> +static inline int arm_el_to_mmu_idx(int current_el) >>> +{ >>> +#ifdef CONFIG_USER_ONLY >>> + return MMU_USER_IDX; >>> +#else >>> + switch (current_el) { >>> + case 0: >>> + return MMU_USER_IDX; >>> + case 1: >>> + return 0; >>> + default: >>> + /* Unsupported EL. */ >>> + assert(0); >>> + return 0; >>> + } >>> +#endif >> Can we just make the EL and the MMU index the same thing, >> or is secure-vs-nonsecure going to need its own MMU >> indexes anyway? > Right, I did the conversion to 1:1 mapping at an early stage > but avoided it as we will need an indirect mapping for > Secure EL0/1 anyway. How often do we switch between secure and non-secure? If it doesn't happen all that often, we could just flush the TLB on every transition. Alex