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From: Paolo Bonzini <pbonzini@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets
Date: Fri, 23 May 2014 20:10:58 +0200	[thread overview]
Message-ID: <537F8F32.40305@redhat.com> (raw)
In-Reply-To: <CAFEAcA_QBDt_hKCRVMiq16eACshtu0T4f9eJTt7AC_VLAhN_Pw@mail.gmail.com>

Il 23/05/2014 19:59, Peter Maydell ha scritto:
> On 2 May 2014 15:33, Paolo Bonzini <pbonzini@redhat.com> wrote:
>> On the x86, some devices need access to the CPU reset pin (INIT#).
>> Provide a generic service to do this, using one of the internal
>> cpu_interrupt targets.  Generalize the PPC-specific code for
>> CPU_INTERRUPT_RESET to other targets.
>>
>> Since PPC does not support migration across QEMU versions (its
>> machine types are not versioned yet), I picked the value that
>> is used on x86, CPU_INTERRUPT_TGT_INT_1.  Consequently, TGT_INT_2
>> and TGT_INT_3 are shifted down by one while keeping their value.
>>
>> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>> ---
>>  cpu-exec.c             | 23 +++++++++++++----------
>>  cpus.c                 |  9 +++++++++
>>  include/exec/cpu-all.h |  8 +++++---
>>  include/sysemu/cpus.h  |  1 +
>>  target-i386/cpu.h      |  7 ++++---
>>  target-ppc/cpu.h       |  3 ---
>>  6 files changed, 32 insertions(+), 19 deletions(-)
>>
>> diff --git a/cpu-exec.c b/cpu-exec.c
>> index 2f54054..38e5f02 100644
>> --- a/cpu-exec.c
>> +++ b/cpu-exec.c
>> @@ -336,19 +336,25 @@ int cpu_exec(CPUArchState *env)
>>                      }
>>  #endif
>>  #if defined(TARGET_I386)
>> +                    if (interrupt_request & CPU_INTERRUPT_INIT) {
>> +                        cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
>> +                        do_cpu_init(x86_cpu);
>> +                        cpu->exception_index = EXCP_HALTED;
>> +                        cpu_loop_exit(cpu);
>> +                    }
>> +#else
>> +                    if (interrupt_request & CPU_INTERRUPT_RESET) {
>> +                        cpu_reset(cpu);
>> +                    }
>> +#endif
>
> I was looking at cleaning up the horrible ifdef ladder a little
> lower in this function, and I noticed this code had been
> added recently. Why is TARGET_I386 a special case here?

Because a hypervisor (cpu_svm_check_intercept_param) can block the 
interrupt.  Note that CPU_INTERRUPT_INIT is actually the same bit as 
CPU_INTERRUPT_RESET.

The whole #ifdef mess should probably be changed to a function in cpu.c, 
now that we don't have AREG0 constraints anymore.

Paolo

  reply	other threads:[~2014-05-23 18:11 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-02 14:33 [Qemu-devel] [PATCH v2 0/8] x86: correctly implement soft reset Paolo Bonzini
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 1/8] kvm: reset state from the CPU's reset method Paolo Bonzini
2014-05-12  7:15   ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 2/8] kvm: forward INIT signals coming from the chipset Paolo Bonzini
2014-05-12  7:59   ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 3/8] target-i386: fix set of registers zeroed on reset Paolo Bonzini
2014-05-12  7:56   ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 4/8] target-i386: preserve FPU and MSR state on INIT Paolo Bonzini
2014-05-12  7:23   ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 5/8] apic: do not accept SIPI on the bootstrap processor Paolo Bonzini
2014-05-12  7:36   ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets Paolo Bonzini
2014-05-12  7:47   ` Andreas Färber
2014-05-12  9:41     ` Peter Maydell
2014-05-12 10:31       ` Paolo Bonzini
2014-05-23 17:59   ` Peter Maydell
2014-05-23 18:10     ` Paolo Bonzini [this message]
2014-05-24  8:30       ` Peter Maydell
2014-05-24 12:59         ` Paolo Bonzini
2014-05-24 15:54           ` Peter Maydell
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 7/8] pc: port 92 reset requires a low->high transition Paolo Bonzini
2014-05-12  7:48   ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 8/8] x86: correctly implement soft reset Paolo Bonzini
2014-05-05 12:13   ` Michael S. Tsirkin
2014-05-12  7:53   ` Andreas Färber
2014-05-12  9:12     ` Paolo Bonzini
2014-05-05 12:11 ` [Qemu-devel] [PATCH v2 0/8] " Michael S. Tsirkin

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