[Qemu-devel] [PATCH] powerpc: use float64 for frsqrte

[Qemu-devel] [PATCH] powerpc: use float64 for frsqrte

[Tristan Gingold]

Remove the code that reduce the result to float32 as the frsqrte
instruction is defined to return a double-precision estimate of
the reciprocal square root.

Although reducing the fractional part is harmless (as the estimation
must have at least 12 bits of precision according to the old PEM),
reducing the exponent range is not correct.

Signed-off-by: Tristan Gingold <gingold@adacore.com>
---
 target-ppc/fpu_helper.c |    3 ---
 1 file changed, 3 deletions(-)

diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index cd8f015..da93d12 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -977,7 +977,6 @@ uint64_t helper_fres(CPUPPCState *env, uint64_t arg)
 uint64_t helper_frsqrte(CPUPPCState *env, uint64_t arg)
 {
     CPU_DoubleU farg;
-    float32 f32;
 
     farg.ll = arg;
 
@@ -991,8 +990,6 @@ uint64_t helper_frsqrte(CPUPPCState *env, uint64_t arg)
         }
         farg.d = float64_sqrt(farg.d, &env->fp_status);
         farg.d = float64_div(float64_one, farg.d, &env->fp_status);
-        f32 = float64_to_float32(farg.d, &env->fp_status);
-        farg.d = float32_to_float64(f32, &env->fp_status);
     }
     return farg.ll;
 }
-- 
1.7.10.4

Re: [Qemu-devel] [PATCH] powerpc: use float64 for frsqrte

[Alexander Graf]

On 06/03/2014 11:14 AM, Tristan Gingold wrote:
> Remove the code that reduce the result to float32 as the frsqrte
> instruction is defined to return a double-precision estimate of
> the reciprocal square root.
>
> Although reducing the fractional part is harmless (as the estimation
> must have at least 12 bits of precision according to the old PEM),
> reducing the exponent range is not correct.
>
> Signed-off-by: Tristan Gingold <gingold@adacore.com>

I couldn't find a reference to doubles in ISA 2.07. Is frsqrte supposed 
to return doubles on all cores? Or is this implementation specific? 
Also, is frsqrte the only instruction affected?


Alex

> ---
>   target-ppc/fpu_helper.c |    3 ---
>   1 file changed, 3 deletions(-)
>
> diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
> index cd8f015..da93d12 100644
> --- a/target-ppc/fpu_helper.c
> +++ b/target-ppc/fpu_helper.c
> @@ -977,7 +977,6 @@ uint64_t helper_fres(CPUPPCState *env, uint64_t arg)
>   uint64_t helper_frsqrte(CPUPPCState *env, uint64_t arg)
>   {
>       CPU_DoubleU farg;
> -    float32 f32;
>   
>       farg.ll = arg;
>   
> @@ -991,8 +990,6 @@ uint64_t helper_frsqrte(CPUPPCState *env, uint64_t arg)
>           }
>           farg.d = float64_sqrt(farg.d, &env->fp_status);
>           farg.d = float64_div(float64_one, farg.d, &env->fp_status);
> -        f32 = float64_to_float32(farg.d, &env->fp_status);
> -        farg.d = float32_to_float64(f32, &env->fp_status);
>       }
>       return farg.ll;
>   }

Re: [Qemu-devel] [PATCH] powerpc: use float64 for frsqrte

[Tristan Gingold]

On 03 Jun 2014, at 12:02, Alexander Graf <agraf@suse.de> wrote:

> On 06/03/2014 11:14 AM, Tristan Gingold wrote:
>> Remove the code that reduce the result to float32 as the frsqrte
>> instruction is defined to return a double-precision estimate of
>> the reciprocal square root.
>> 
>> Although reducing the fractional part is harmless (as the estimation
>> must have at least 12 bits of precision according to the old PEM),
>> reducing the exponent range is not correct.
>> 
>> Signed-off-by: Tristan Gingold <gingold@adacore.com>
> 
> I couldn't find a reference to doubles in ISA 2.07. Is frsqrte supposed to return doubles on all cores?

I have just checked ISA V 2.06 (will download 2.07 if necessary).  There are now two
instructions: frsqrte and frsqrtes.  The second one if for single - so the first one is for double.

[ If you look at IBM AIX assembly manual:
http://publib.boulder.ibm.com/infocenter/pseries/v5r3/index.jsp?topic=/com.ibm.aix.aixassem/doc/alangref/frsqrte.htm

they clearly mention that frsqrte operates on double on 603, 604 but not implemented on 601]

>  Or is this implementation specific?

This instruction is optional and the precision of the estimation is implementation dependant.
I have looked at some implementation manuals (604, 603, e300) and they don't mention single.

> Also, is frsqrte the only instruction affected?

Yes.  Operation fres operates on single.

Tristan.

> 
> 
> Alex
> 
>> ---
>>  target-ppc/fpu_helper.c |    3 ---
>>  1 file changed, 3 deletions(-)
>> 
>> diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
>> index cd8f015..da93d12 100644
>> --- a/target-ppc/fpu_helper.c
>> +++ b/target-ppc/fpu_helper.c
>> @@ -977,7 +977,6 @@ uint64_t helper_fres(CPUPPCState *env, uint64_t arg)
>>  uint64_t helper_frsqrte(CPUPPCState *env, uint64_t arg)
>>  {
>>      CPU_DoubleU farg;
>> -    float32 f32;
>>        farg.ll = arg;
>>  @@ -991,8 +990,6 @@ uint64_t helper_frsqrte(CPUPPCState *env, uint64_t arg)
>>          }
>>          farg.d = float64_sqrt(farg.d, &env->fp_status);
>>          farg.d = float64_div(float64_one, farg.d, &env->fp_status);
>> -        f32 = float64_to_float32(farg.d, &env->fp_status);
>> -        farg.d = float32_to_float64(f32, &env->fp_status);
>>      }
>>      return farg.ll;
>>  }
>