From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47174) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WrnZ0-0000sw-LD for qemu-devel@nongnu.org; Tue, 03 Jun 2014 08:11:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WrnYv-0004l2-T0 for qemu-devel@nongnu.org; Tue, 03 Jun 2014 08:11:34 -0400 Received: from mx1.redhat.com ([209.132.183.28]:64681) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WrnYv-0004kq-Js for qemu-devel@nongnu.org; Tue, 03 Jun 2014 08:11:29 -0400 Message-ID: <538DBB6B.2010709@redhat.com> Date: Tue, 03 Jun 2014 14:11:23 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC PATCH v1 00/11] Per Master Addressing (PMA) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, edgari@xilinx.com, afaerber@suse.de Il 03/06/2014 04:06, Peter Crosthwaite ha scritto: > Hi All, > > This series implements Per-bus-Master Address spaces (PMA). It builds > on the merged components of Edgar's original series: > > https://lists.gnu.org/archive/html/qemu-devel/2014-02/msg01346.html > > And my pending MemoryRegion QOMification: > > https://lists.nongnu.org/archive/html/qemu-devel/2014-06/msg00029.html > > The approach is based on PMA as discussed KVM call 2014-05-13. MOM: > > http://lists.gnu.org/archive/html/qemu-devel/2014-05/msg02430.html > > " > PM: Address space is flattended memory regions, needed for actual memory > access when constructing machines, we deal with memory regions, not > address spaces > > AF+PM: Each CPU should have its own address space > > ... > > Do busmasters get their own address space, too? > PM: Yes > " > > Patches 3-9 patch memory, exec and CPU to enable this capability > generally. The basic idea is MemoryRegions are QOM/linkable, and masters > create their own AddressSpace as needed from their given MRs. > > The PetaLogix ml605 board is converted to use the new framework as the > lead example P10/11. It is tested as working. For a diagram of the real > hardware setup WRT to DMA and bus master visibility: > > http://www.xilinx.com/support/documentation/ip_documentation/axi_dma/v6_03_a/pg021_axi_dma.pdf > > page 49. > > This series is work-in-progress and has numerous FIXMEs in it. > Looking for conceptual level commentary. > > 2 trivials at the front of the series. Easily skipped by reviewers. > > Regards, > Peter > > > Peter Crosthwaite (11): > microblaze: ml605: Get rid of useless ddr_base variable > dma: axidma: Variablise repeated s->streams[i] sub-expr > exec: Parent root MRs to the machine > exec: dummy_section: Pass address space through. > memory: Parent Memory Regions to their registered owners > memory: address_space_init: do nothing if no root region given > memory.c: Add address_space_init_shareable() > qom/cpu: Add Memory Region Property > exec: use per-cpu address-spaces for cpuisms > microblaze: ml605: Convert to PMA > dma: axidma: Convert to PMA > > exec.c | 23 +++++++++++------- > hw/core/loader.c | 2 +- > hw/dma/xilinx_axidma.c | 47 ++++++++++++++++++++++++++++++------- > hw/microblaze/petalogix_ml605_mmu.c | 42 ++++++++++++++++++++++++--------- > include/exec/memory.h | 2 ++ > include/qom/cpu.h | 1 + > memory.c | 47 +++++++++++++++++++++++++++++++++++++ > qom/cpu.c | 30 +++++++++++++++++++++++ > 8 files changed, 165 insertions(+), 29 deletions(-) > Makes sense. Patch 4 is an obvious cleanup/bugfix and I'm applying it now to my tree. Paolo