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From: Alexander Graf <agraf@suse.de>
To: Greg Kurz <gkurz@linux.vnet.ibm.com>
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>,
	Tom Musta <tommusta@gmail.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH v4 02/29] target-ppc: Merge 970FX and 970MP into	a single 970 class
Date: Tue, 03 Jun 2014 18:11:02 +0200	[thread overview]
Message-ID: <538DF396.5010709@suse.de> (raw)
In-Reply-To: <20140603174057.38316acb@bahia.local>

On 06/03/2014 05:40 PM, Greg Kurz wrote:
> On Tue,  3 Jun 2014 19:27:37 +1000
> Alexey Kardashevskiy <aik@ozlabs.ru> wrote:
>
>> The differences between classes were:
>> 1. SLB size, was 32 for 970 and 64 for others, should be 64 for all;
>> 2. check_pow() callback, HID0 format is the same so should be the same
>> 0x01C00000 which means "deep nap", "doze" and "nap" bits set;
>> 3. LPCR - 970 does not have it but 970MP had one (by mistake).
>>
>> This fixes wrong differences and makes one 970 class.
>>
>> This fixes wrong registration of LPCR which is not present on 970.
>>
>> This does not copy MSR_SHV (Hypervisor State, HV) bit from 970FX to
>> 970 class as we do not emulate hypervisor in QEMU anyway.
>>
>> This does not remove check_pow_970FX now as it is still used by POWER5+
>> class, this will be addressed later.
>>
>> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
>> ---
>>   target-ppc/cpu-models.c     |  14 +--
>>   target-ppc/translate_init.c | 222 ++++----------------------------------------
>>   2 files changed, 23 insertions(+), 213 deletions(-)
>>
>> diff --git a/target-ppc/cpu-models.c b/target-ppc/cpu-models.c
>> index 9a66c03..97a81d8 100644
>> --- a/target-ppc/cpu-models.c
>> +++ b/target-ppc/cpu-models.c
>> @@ -1142,19 +1142,19 @@
>>                   "POWER8 v1.0")
>>       POWERPC_DEF("970",           CPU_POWERPC_970,                    970,
>>                   "PowerPC 970")
>> -    POWERPC_DEF("970fx_v1.0",    CPU_POWERPC_970FX_v10,              970FX,
>> +    POWERPC_DEF("970fx_v1.0",    CPU_POWERPC_970FX_v10,              970,
>>                   "PowerPC 970FX v1.0 (G5)")
>> -    POWERPC_DEF("970fx_v2.0",    CPU_POWERPC_970FX_v20,              970FX,
>> +    POWERPC_DEF("970fx_v2.0",    CPU_POWERPC_970FX_v20,              970,
>>                   "PowerPC 970FX v2.0 (G5)")
>> -    POWERPC_DEF("970fx_v2.1",    CPU_POWERPC_970FX_v21,              970FX,
>> +    POWERPC_DEF("970fx_v2.1",    CPU_POWERPC_970FX_v21,              970,
>>                   "PowerPC 970FX v2.1 (G5)")
>> -    POWERPC_DEF("970fx_v3.0",    CPU_POWERPC_970FX_v30,              970FX,
>> +    POWERPC_DEF("970fx_v3.0",    CPU_POWERPC_970FX_v30,              970,
>>                   "PowerPC 970FX v3.0 (G5)")
>> -    POWERPC_DEF("970fx_v3.1",    CPU_POWERPC_970FX_v31,              970FX,
>> +    POWERPC_DEF("970fx_v3.1",    CPU_POWERPC_970FX_v31,              970,
>>                   "PowerPC 970FX v3.1 (G5)")
>> -    POWERPC_DEF("970mp_v1.0",    CPU_POWERPC_970MP_v10,              970MP,
>> +    POWERPC_DEF("970mp_v1.0",    CPU_POWERPC_970MP_v10,              970,
>>                   "PowerPC 970MP v1.0")
>> -    POWERPC_DEF("970mp_v1.1",    CPU_POWERPC_970MP_v11,              970MP,
>> +    POWERPC_DEF("970mp_v1.1",    CPU_POWERPC_970MP_v11,              970,
>>                   "PowerPC 970MP v1.1")
>>   #if defined(TODO)
>>       POWERPC_DEF("Cell",          CPU_POWERPC_CELL,                   970,
>> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
>> index fa137af..2f40d0d 100644
>> --- a/target-ppc/translate_init.c
>> +++ b/target-ppc/translate_init.c
>> @@ -7268,8 +7268,9 @@ POWERPC_FAMILY(e600)(ObjectClass *oc, void *data)
>>
>>   static int check_pow_970 (CPUPPCState *env)
>>   {
>> -    if (env->spr[SPR_HID0] & 0x00600000)
>> +    if (env->spr[SPR_HID0] & 0x01C00000) {
> What about killing magic numbers with something like:
>
> #define HID0_DEEPNAP    (1<<24)
> #define HID0_DOZE       (1<<23)
> #define HID0_NAP        (1<<22)

I like the idea. But IMHO this can easily come as a follow-up patch if 
that's the only nit on this patch set :).


Alex

  reply	other threads:[~2014-06-03 16:11 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-03  9:27 [Qemu-devel] [PATCH v4 00/29] book3s powerpc classes (970, power5, power7, power8) rework Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 01/29] target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs Alexey Kardashevskiy
2014-06-03 16:32   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 02/29] target-ppc: Merge 970FX and 970MP into a single 970 class Alexey Kardashevskiy
2014-06-03 15:40   ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2014-06-03 16:11     ` Alexander Graf [this message]
2014-06-03 16:25   ` [Qemu-devel] " Tom Musta
2014-06-04  4:48     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 03/29] target-ppc: Refactor PPC970 Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 04/29] target-ppc: Copy and split gen_spr_7xx() for 970 Alexey Kardashevskiy
2014-06-03 16:32   ` Tom Musta
2014-06-04  5:09     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 05/29] target-ppc: Add "POWER" prefix to MMCRA PMU registers Alexey Kardashevskiy
2014-06-03 16:35   ` Tom Musta
2014-06-04  1:36     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 06/29] target-ppc: Add PMC5/6, SDAR and MMCRA to 970 family Alexey Kardashevskiy
2014-06-03 16:36   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 07/29] target-ppc: Add PMC7/8 to 970 class Alexey Kardashevskiy
2014-06-03 16:37   ` Tom Musta
2014-06-03 16:42   ` Tom Musta
2014-06-04  5:25     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 08/29] target-ppc: Add HID4 SPR for PPC970 Alexey Kardashevskiy
2014-06-03 16:43   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 09/29] target-ppc: Introduce and reuse generalized init_proc_book3s_64() Alexey Kardashevskiy
2014-06-03 16:45   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 10/29] target-ppc: Remove check_pow_970FX Alexey Kardashevskiy
2014-06-03 16:45   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 11/29] target-ppc: Enable PMU SPRs migration Alexey Kardashevskiy
2014-06-03 16:47   ` Tom Musta
2014-06-04  1:46     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 12/29] target-ppc: Move POWER7/8 PIR/PURR/SPURR SPR registration to helpers Alexey Kardashevskiy
2014-06-03 16:48   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 13/29] target-ppc: Move POWER8 TCE Address control (TAR) to a helper Alexey Kardashevskiy
2014-06-03 16:48   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 14/29] target-ppc: Move POWER7/8 CFAR/DSCR/CTRL/PPR/PCR SPR registration to helpers Alexey Kardashevskiy
2014-06-03 16:54   ` Tom Musta
2014-06-04  2:02     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 15/29] target-ppc: Make use of gen_spr_book3s_altivec() for POWER7/8 Alexey Kardashevskiy
2014-06-03 16:54   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 16/29] target-ppc: Make use of gen_spr_book3s_lpar() " Alexey Kardashevskiy
2014-06-03 16:54   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 17/29] target-ppc: Switch POWER7/8 classes to use correct PMU SPRs Alexey Kardashevskiy
2014-06-03 16:55   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 18/29] target-ppc: Refactor class init for POWER7/8 Alexey Kardashevskiy
2014-06-03 16:57   ` Tom Musta
2014-06-04  2:09     ` Alexey Kardashevskiy
2014-06-04 12:24       ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 19/29] target-ppc: Add POWER7's TIR SPR Alexey Kardashevskiy
2014-06-03 16:59   ` Tom Musta
2014-06-04  2:14     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 20/29] target-ppc: Add POWER8's FSCR SPR Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 21/29] target-ppc: Enable FSCR facility check for TAR Alexey Kardashevskiy
2014-06-03 17:08   ` Tom Musta
2014-06-04  2:37     ` Alexey Kardashevskiy
2014-06-04 12:25       ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 22/29] target-ppc: Add POWER8's MMCR2/MMCRS SPRs Alexey Kardashevskiy
2014-06-03 17:10   ` Tom Musta
2014-06-03 23:42     ` Alexey Kardashevskiy
2014-06-04  5:26       ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 23/29] target-ppc: Add POWER8's TM SPRs Alexey Kardashevskiy
2014-06-03 17:58   ` Tom Musta
2014-06-04  2:54     ` Alexey Kardashevskiy
2014-06-04 12:30       ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 24/29] KVM: target-ppc: Enable TM state migration Alexey Kardashevskiy
2014-06-03  9:28 ` [Qemu-devel] [PATCH v4 25/29] target-ppc: Add POWER8's Event Based Branch (EBB) control SPRs Alexey Kardashevskiy
2014-06-03 18:01   ` Tom Musta
2014-06-03  9:28 ` [Qemu-devel] [PATCH v4 26/29] target-ppc: Enable PPR and VRSAVE SPRs migration Alexey Kardashevskiy
2014-06-03  9:28 ` [Qemu-devel] [PATCH v4 27/29] target-ppc: Enable DABRX SPR and limit it to <=POWER7 Alexey Kardashevskiy
2014-06-03 18:05   ` Tom Musta
2014-06-04  3:12     ` Alexey Kardashevskiy
2014-06-03  9:28 ` [Qemu-devel] [PATCH v4 28/29] spapr_hcall: Split h_set_mode() Alexey Kardashevskiy
2014-06-03  9:28 ` [Qemu-devel] [PATCH v4 29/29] spapr_hcall: Add address-translation-mode-on-interrupt resource in H_SET_MODE Alexey Kardashevskiy
2014-06-03 16:51   ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2014-06-03 23:44     ` Alexey Kardashevskiy

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