From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41485) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wrrda-0002oZ-Ua for qemu-devel@nongnu.org; Tue, 03 Jun 2014 12:32:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WrrdR-0004uI-PQ for qemu-devel@nongnu.org; Tue, 03 Jun 2014 12:32:34 -0400 Message-ID: <538DF896.3060904@gmail.com> Date: Tue, 03 Jun 2014 11:32:22 -0500 From: Tom Musta MIME-Version: 1.0 References: <1401787684-31895-1-git-send-email-aik@ozlabs.ru> <1401787684-31895-5-git-send-email-aik@ozlabs.ru> In-Reply-To: <1401787684-31895-5-git-send-email-aik@ozlabs.ru> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v4 04/29] target-ppc: Copy and split gen_spr_7xx() for 970 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexey Kardashevskiy , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Alexander Graf On 6/3/2014 4:27 AM, Alexey Kardashevskiy wrote: > +static void gen_spr_book3s_pmu_user(CPUPPCState *env) > +{ > + spr_register(env, SPR_POWER_UMMCR0, "UMMCR0", > + &spr_read_ureg, SPR_NOACCESS, > + &spr_read_ureg, SPR_NOACCESS, > + 0x00000000); > + spr_register(env, SPR_POWER_UMMCR1, "UMMCR1", > + &spr_read_ureg, SPR_NOACCESS, > + &spr_read_ureg, SPR_NOACCESS, > + 0x00000000); > + spr_register(env, SPR_POWER_UPMC1, "UPMC1", > + &spr_read_ureg, SPR_NOACCESS, > + &spr_read_ureg, SPR_NOACCESS, > + 0x00000000); > + spr_register(env, SPR_POWER_UPMC2, "UPMC2", > + &spr_read_ureg, SPR_NOACCESS, > + &spr_read_ureg, SPR_NOACCESS, > + 0x00000000); > + spr_register(env, SPR_POWER_UPMC3, "UPMC3", > + &spr_read_ureg, SPR_NOACCESS, > + &spr_read_ureg, SPR_NOACCESS, > + 0x00000000); > + spr_register(env, SPR_POWER_UPMC4, "UPMC4", > + &spr_read_ureg, SPR_NOACCESS, > + &spr_read_ureg, SPR_NOACCESS, > + 0x00000000); > + spr_register(env, SPR_POWER_USIAR, "USIAR", > + &spr_read_ureg, SPR_NOACCESS, > + &spr_read_ureg, SPR_NOACCESS, > + 0x00000000); > +} The Uxxxx regs are writeable from supervisor state, aren't they? (similar comment as UCTRL). There is also this complicating factor in ISA 2.07 (P8) whereby the PMU Uxxxx SPRs are readable/writeable based on the state of MMCR0[PMCC] (ick!). I think either of these can be handled in follow up patches. I am also not sure that I see a compelling reason to model the MMCR0[PMCC] accessibility unless we actually start modeling the PMU (hard). Reviewed-by: Tom Musta