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From: Alexey Kardashevskiy <aik@ozlabs.ru>
To: Tom Musta <tommusta@gmail.com>, qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, Alexander Graf <agraf@suse.de>
Subject: Re: [Qemu-devel] [PATCH v4 21/29] target-ppc: Enable FSCR facility check for TAR
Date: Wed, 04 Jun 2014 12:37:51 +1000	[thread overview]
Message-ID: <538E867F.5060002@ozlabs.ru> (raw)
In-Reply-To: <538E0101.3030605@gmail.com>

On 06/04/2014 03:08 AM, Tom Musta wrote:
> On 6/3/2014 4:27 AM, Alexey Kardashevskiy wrote:
>> This makes user-privileged read/write fail if TAR facility is not enabled
>> in FSCR.
>>
>> Since this is the very first check for enabled in FSCR facility,
>> this also adds gen_fscr_facility_check() for using in spr_write_tar()/
>> spr_read_tar().
>>
>> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
>> ---
>>  target-ppc/translate_init.c | 29 ++++++++++++++++++++++++++++-
>>  1 file changed, 28 insertions(+), 1 deletion(-)
>>
>> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
>> index 6f0c36b..9b83d56 100644
>> --- a/target-ppc/translate_init.c
>> +++ b/target-ppc/translate_init.c
>> @@ -7275,6 +7275,21 @@ enum BOOK3S_CPU_TYPE {
>>      BOOK3S_CPU_POWER8
>>  };
>>  
>> +static void gen_fscr_facility_check(void *opaque, int facility_sprn, int bit,
>> +                                    int sprn, int cause)
>> +{
>> +    TCGv_i32 t1 = tcg_const_i32(bit);
>> +    TCGv_i32 t2 = tcg_const_i32(sprn);
>> +    TCGv_i32 t3 = tcg_const_i32(cause);
>> +
>> +    gen_update_current_nip(opaque);
>> +    gen_helper_fscr_facility_check(cpu_env, t1, t2, t3);
>> +
>> +    tcg_temp_free_i32(t3);
>> +    tcg_temp_free_i32(t2);
>> +    tcg_temp_free_i32(t1);
>> +}
>> +
>>  static int check_pow_970 (CPUPPCState *env)
>>  {
>>      if (env->spr[SPR_HID0] & 0x01C00000) {
>> @@ -7568,10 +7583,22 @@ static void gen_spr_power6_common(CPUPPCState *env)
>>                   0x00000000);
>>  }
>>  
>> +static void spr_read_tar(void *opaque, int gprn, int sprn)
>> +{
>> +    gen_fscr_facility_check(opaque, SPR_FSCR, FSCR_TAR, sprn, FSCR_IC_TAR);
>> +    spr_read_generic(opaque, gprn, sprn);
>> +}
>> +
>> +static void spr_write_tar(void *opaque, int sprn, int gprn)
>> +{
>> +    gen_fscr_facility_check(opaque, SPR_FSCR, FSCR_TAR, sprn, FSCR_IC_TAR);
>> +    spr_write_generic(opaque, sprn, gprn);
>> +}
>> +
>>  static void gen_spr_power8_tce_address_control(CPUPPCState *env)
>>  {
>>      spr_register(env, SPR_TAR, "TAR",
>> -                 &spr_read_generic, &spr_write_generic,
>> +                 &spr_read_tar, &spr_write_tar,
>>                   &spr_read_generic, &spr_write_generic,
>>                   0x00000000);
>>  }
>>
> 
> There are potential impacts to user mode here.  If I am reading correctly, TAR would not be accessible
> in user mode.


And this is bad why exactly? I definitely need to learn about linux-user
more...


> An obvious fix would be to initialize FSCR to enable TAR access in the user mode build targets.


Like that?

 static void gen_spr_power8_fscr(CPUPPCState *env)
 {
+#if defined(CONFIG_USER_ONLY)
+    target_ulong initval = 1ULL << FSCR_TAR;
+#else
+    target_ulong initval = 0;
+#endif
     spr_register_kvm(env, SPR_FSCR, "FSCR",
                      SPR_NOACCESS, SPR_NOACCESS,
                      &spr_read_generic, &spr_write_generic,
-                     KVM_REG_PPC_FSCR, 0x00000000);
+                     KVM_REG_PPC_FSCR, initval);
 }


-- 
Alexey

  reply	other threads:[~2014-06-04  2:38 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-03  9:27 [Qemu-devel] [PATCH v4 00/29] book3s powerpc classes (970, power5, power7, power8) rework Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 01/29] target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs Alexey Kardashevskiy
2014-06-03 16:32   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 02/29] target-ppc: Merge 970FX and 970MP into a single 970 class Alexey Kardashevskiy
2014-06-03 15:40   ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2014-06-03 16:11     ` Alexander Graf
2014-06-03 16:25   ` [Qemu-devel] " Tom Musta
2014-06-04  4:48     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 03/29] target-ppc: Refactor PPC970 Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 04/29] target-ppc: Copy and split gen_spr_7xx() for 970 Alexey Kardashevskiy
2014-06-03 16:32   ` Tom Musta
2014-06-04  5:09     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 05/29] target-ppc: Add "POWER" prefix to MMCRA PMU registers Alexey Kardashevskiy
2014-06-03 16:35   ` Tom Musta
2014-06-04  1:36     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 06/29] target-ppc: Add PMC5/6, SDAR and MMCRA to 970 family Alexey Kardashevskiy
2014-06-03 16:36   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 07/29] target-ppc: Add PMC7/8 to 970 class Alexey Kardashevskiy
2014-06-03 16:37   ` Tom Musta
2014-06-03 16:42   ` Tom Musta
2014-06-04  5:25     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 08/29] target-ppc: Add HID4 SPR for PPC970 Alexey Kardashevskiy
2014-06-03 16:43   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 09/29] target-ppc: Introduce and reuse generalized init_proc_book3s_64() Alexey Kardashevskiy
2014-06-03 16:45   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 10/29] target-ppc: Remove check_pow_970FX Alexey Kardashevskiy
2014-06-03 16:45   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 11/29] target-ppc: Enable PMU SPRs migration Alexey Kardashevskiy
2014-06-03 16:47   ` Tom Musta
2014-06-04  1:46     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 12/29] target-ppc: Move POWER7/8 PIR/PURR/SPURR SPR registration to helpers Alexey Kardashevskiy
2014-06-03 16:48   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 13/29] target-ppc: Move POWER8 TCE Address control (TAR) to a helper Alexey Kardashevskiy
2014-06-03 16:48   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 14/29] target-ppc: Move POWER7/8 CFAR/DSCR/CTRL/PPR/PCR SPR registration to helpers Alexey Kardashevskiy
2014-06-03 16:54   ` Tom Musta
2014-06-04  2:02     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 15/29] target-ppc: Make use of gen_spr_book3s_altivec() for POWER7/8 Alexey Kardashevskiy
2014-06-03 16:54   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 16/29] target-ppc: Make use of gen_spr_book3s_lpar() " Alexey Kardashevskiy
2014-06-03 16:54   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 17/29] target-ppc: Switch POWER7/8 classes to use correct PMU SPRs Alexey Kardashevskiy
2014-06-03 16:55   ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 18/29] target-ppc: Refactor class init for POWER7/8 Alexey Kardashevskiy
2014-06-03 16:57   ` Tom Musta
2014-06-04  2:09     ` Alexey Kardashevskiy
2014-06-04 12:24       ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 19/29] target-ppc: Add POWER7's TIR SPR Alexey Kardashevskiy
2014-06-03 16:59   ` Tom Musta
2014-06-04  2:14     ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 20/29] target-ppc: Add POWER8's FSCR SPR Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 21/29] target-ppc: Enable FSCR facility check for TAR Alexey Kardashevskiy
2014-06-03 17:08   ` Tom Musta
2014-06-04  2:37     ` Alexey Kardashevskiy [this message]
2014-06-04 12:25       ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 22/29] target-ppc: Add POWER8's MMCR2/MMCRS SPRs Alexey Kardashevskiy
2014-06-03 17:10   ` Tom Musta
2014-06-03 23:42     ` Alexey Kardashevskiy
2014-06-04  5:26       ` Alexey Kardashevskiy
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 23/29] target-ppc: Add POWER8's TM SPRs Alexey Kardashevskiy
2014-06-03 17:58   ` Tom Musta
2014-06-04  2:54     ` Alexey Kardashevskiy
2014-06-04 12:30       ` Tom Musta
2014-06-03  9:27 ` [Qemu-devel] [PATCH v4 24/29] KVM: target-ppc: Enable TM state migration Alexey Kardashevskiy
2014-06-03  9:28 ` [Qemu-devel] [PATCH v4 25/29] target-ppc: Add POWER8's Event Based Branch (EBB) control SPRs Alexey Kardashevskiy
2014-06-03 18:01   ` Tom Musta
2014-06-03  9:28 ` [Qemu-devel] [PATCH v4 26/29] target-ppc: Enable PPR and VRSAVE SPRs migration Alexey Kardashevskiy
2014-06-03  9:28 ` [Qemu-devel] [PATCH v4 27/29] target-ppc: Enable DABRX SPR and limit it to <=POWER7 Alexey Kardashevskiy
2014-06-03 18:05   ` Tom Musta
2014-06-04  3:12     ` Alexey Kardashevskiy
2014-06-03  9:28 ` [Qemu-devel] [PATCH v4 28/29] spapr_hcall: Split h_set_mode() Alexey Kardashevskiy
2014-06-03  9:28 ` [Qemu-devel] [PATCH v4 29/29] spapr_hcall: Add address-translation-mode-on-interrupt resource in H_SET_MODE Alexey Kardashevskiy
2014-06-03 16:51   ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2014-06-03 23:44     ` Alexey Kardashevskiy

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