From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58410) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WsJBo-0006pX-NT for qemu-devel@nongnu.org; Wed, 04 Jun 2014 17:57:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WsJBf-0007yu-Lz for qemu-devel@nongnu.org; Wed, 04 Jun 2014 17:57:44 -0400 Sender: Richard Henderson Message-ID: <538F9638.8000404@twiddle.net> Date: Wed, 04 Jun 2014 14:57:12 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1401916152-27169-1-git-send-email-agraf@suse.de> <1401916152-27169-2-git-send-email-agraf@suse.de> <538F91D1.1030604@twiddle.net> <538F94D9.1000203@suse.de> In-Reply-To: <538F94D9.1000203@suse.de> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/2] PPC: e500: Merge 32 and 64 bit SPE emulation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf , qemu-ppc@nongnu.org Cc: Tom Musta , qemu-devel@nongnu.org On 06/04/2014 02:51 PM, Alexander Graf wrote: > > On 04.06.14 23:38, Richard Henderson wrote: >> On 06/04/2014 02:09 PM, Alexander Graf wrote: >>> @@ -9030,13 +8820,10 @@ static inline void gen_evmwumi(DisasContext *ctx) >>> t1 = tcg_temp_new_i64(); >>> /* t0 := rA; t1 := rB */ >>> -#if defined(TARGET_PPC64) >>> - tcg_gen_ext32u_tl(t0, cpu_gpr[rA(ctx->opcode)]); >>> - tcg_gen_ext32u_tl(t1, cpu_gpr[rB(ctx->opcode)]); >>> -#else >>> tcg_gen_extu_tl_i64(t0, cpu_gpr[rA(ctx->opcode)]); >>> + tcg_gen_ext32u_i64(t0, t0); >> Better in one step: >> >> tcg_gen_ext32u_i64(t0, cpu_gpr[rA(ctx->opcode)]); > > But cpu_gpr can be i32 for qemu-system-ppc, no? Err.. right. We don't have an extend define for this mix. r~