From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40837) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wullh-0001V6-LU for qemu-devel@nongnu.org; Wed, 11 Jun 2014 12:53:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WullV-0004uu-Sx for qemu-devel@nongnu.org; Wed, 11 Jun 2014 12:52:57 -0400 Received: from mail-qc0-x22a.google.com ([2607:f8b0:400d:c01::22a]:52912) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WullV-0004uq-LF for qemu-devel@nongnu.org; Wed, 11 Jun 2014 12:52:45 -0400 Received: by mail-qc0-f170.google.com with SMTP id l6so24783qcy.15 for ; Wed, 11 Jun 2014 09:52:45 -0700 (PDT) Sender: Richard Henderson Message-ID: <53988959.2090803@twiddle.net> Date: Wed, 11 Jun 2014 09:52:41 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1402499992-64851-1-git-send-email-leon.alrae@imgtec.com> <1402499992-64851-14-git-send-email-leon.alrae@imgtec.com> In-Reply-To: <1402499992-64851-14-git-send-email-leon.alrae@imgtec.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 13/22] target-mips: add Compact Branches List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Leon Alrae , qemu-devel@nongnu.org Cc: yongbok.kim@imgtec.com, cristian.cuna@imgtec.com, aurelien@aurel32.net On 06/11/2014 08:19 AM, Leon Alrae wrote: > + case OPC_BEQZC: > + tcg_gen_setcondi_tl(TCG_COND_EQ, bcond, t0, 0); > + break; ... > + /* Compact branches don't have delay slot, thus generating branch here */ > + /* TODO: implement forbidden slot */ > + gen_branch(ctx, 4); This is not what I meant by generating a branch directly. I meant generating tcg_gen_brcondi(TCG_COND_EQ, t0, 0, label) instead of computing setcond into bcond and then branching off a comparison against bcond. Consider creating some sort of structure that defines a condition for the translator, much like target-s390x does with struct DisasCompare or target-i386 does with struct CCPrepare. That lets "old" branches set up a condition based off bcond, and your new branches set up a condition based off the general registers (or brand new temps in the case of BOVC/BNVC). The ability to select the TCG compare op also allows you to avoid things like the xor at the end of your BNVC computation. r~