From: "Andreas Färber" <afaerber@suse.de>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Alistair Francis <alistair.francis@xilinx.com>
Subject: Re: [Qemu-devel] [RFC v1 1/2] arm: Add the cortex-a9 CPU to the a9mpcore device
Date: Mon, 16 Jun 2014 13:17:46 +0200 [thread overview]
Message-ID: <539ED25A.4000009@suse.de> (raw)
In-Reply-To: <CAFEAcA-JzZp+xeF7tW=1c9oq-vTxV1EfBzY8q-0vA4Ntncd11w@mail.gmail.com>
Am 16.06.2014 13:11, schrieb Peter Maydell:
> On 16 June 2014 11:58, Andreas Färber <afaerber@suse.de> wrote:
>> Well, for Cortex-A9 that may work. But Cortex-A15 (and Cortex-A5x if
>> existant by now) should also be refactored alongside, as proof of
>> concept - can you really create num_cpu cortex-a15 CPUs on the MPCore
>> for a big.LITTLE configuration? I'd be really surprised if there were
>> separate MPCore devices per cluster. That would then indicate that the
>> homogeneity assumption among CPUs within an MPCore is wrong and we need
>> to let its parent create the CPUs rather than an MPCore property.
>
> Not sure what the relevance of big.LITTLE is here -- QEMU
> simply doesn't support heterogenous CPU configurations so
> we can't model big.LITTLE at all.
Not today, but neither can the user fiddle with properties before
realize today. So better not put blockers to known future features, in
particular since I've been working into that direction. Two Cortex-As
with identical software features and just different cache sizes like
A53/A57 should be the easiest inhomogeneous configuration, compared to
my Vybrid A5+M4 work.
> If we did, it would be
> via having a SoC with one a15mpcore and one a7mpcore.
> (This is how the hardware does it -- there are two
> multicore clusters, plus some cache coherency interconnect
> magic.)
Then I'm surprised and we have one issue less to worry about. :)
Thanks,
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
next prev parent reply other threads:[~2014-06-16 11:18 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-10 1:32 [Qemu-devel] [RFC v1 1/2] arm: Add the cortex-a9 CPU to the a9mpcore device Alistair Francis
2014-06-10 1:33 ` [Qemu-devel] [RFC v1 2/2] zynq: Update Zynq to init the CPU in " Alistair Francis
2014-06-16 4:42 ` Peter Crosthwaite
2014-06-16 6:50 ` Alistair Francis
2014-06-16 1:17 ` [Qemu-devel] [RFC v1 1/2] arm: Add the cortex-a9 CPU to " Alistair Francis
2014-06-16 4:43 ` Peter Crosthwaite
2014-06-16 6:04 ` Alistair Francis
2014-06-16 10:26 ` Andreas Färber
2014-06-16 10:19 ` Andreas Färber
2014-06-16 10:34 ` Peter Crosthwaite
2014-06-16 10:58 ` Andreas Färber
2014-06-16 11:11 ` Peter Maydell
2014-06-16 11:17 ` Andreas Färber [this message]
2014-06-16 11:22 ` Peter Crosthwaite
2014-06-16 11:23 ` Andreas Färber
2014-06-16 10:44 ` Peter Maydell
2014-06-16 11:18 ` Andreas Färber
2014-06-16 11:20 ` Peter Maydell
2014-06-16 7:40 ` Peter Maydell
2014-06-16 7:46 ` Peter Crosthwaite
2014-06-17 7:16 ` Stefan Hajnoczi
2014-06-17 8:05 ` Paolo Bonzini
2014-06-17 10:12 ` Peter Crosthwaite
2014-06-17 23:33 ` Alistair Francis
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