From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([2001:4830:134:3::10]:52598)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <afaerber@suse.de>) id 1WwV0v-0000LA-93
	for qemu-devel@nongnu.org; Mon, 16 Jun 2014 07:23:54 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <afaerber@suse.de>) id 1WwV0q-00011L-1W
	for qemu-devel@nongnu.org; Mon, 16 Jun 2014 07:23:49 -0400
Received: from cantor2.suse.de ([195.135.220.15]:36581 helo=mx2.suse.de)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <afaerber@suse.de>) id 1WwV0p-00010k-Rb
	for qemu-devel@nongnu.org; Mon, 16 Jun 2014 07:23:43 -0400
Message-ID: <539ED3BE.2030007@suse.de>
Date: Mon, 16 Jun 2014 13:23:42 +0200
From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= <afaerber@suse.de>
MIME-Version: 1.0
References: <a00d788d723bada207cc99e3e74a1deec80455f1.1402363608.git.alistair.francis@xilinx.com>	<CAEgOgz4N5myT410sNF9hCHZDW0AxM-r4ynkxq+78cO3d19C5HQ@mail.gmail.com>	<539EC4B1.5090709@suse.de>	<CAEgOgz5iXHLzY5tvt3G7gWJDqxCOs4t1xvrLsjsk=gqimS9WDw@mail.gmail.com>	<539ECDEA.1080606@suse.de>	<CAFEAcA-JzZp+xeF7tW=1c9oq-vTxV1EfBzY8q-0vA4Ntncd11w@mail.gmail.com>
	<CAEgOgz45ViuNntLzHOB8ArG3G1HQ6dzwFGjqX9p9A34SfFni6w@mail.gmail.com>
In-Reply-To: <CAEgOgz45ViuNntLzHOB8ArG3G1HQ6dzwFGjqX9p9A34SfFni6w@mail.gmail.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: quoted-printable
Subject: Re: [Qemu-devel] [RFC v1 1/2] arm: Add the cortex-a9 CPU to the
 a9mpcore device
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>, Peter Maydell <peter.maydell@linaro.org>
Cc: "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>, Alistair Francis <alistair.francis@xilinx.com>

Am 16.06.2014 13:22, schrieb Peter Crosthwaite:
> On Mon, Jun 16, 2014 at 9:11 PM, Peter Maydell <peter.maydell@linaro.or=
g> wrote:
>> On 16 June 2014 11:58, Andreas F=C3=A4rber <afaerber@suse.de> wrote:
>>> Besides, not all CPUs have an MPCore, Cortex-A8 and Cortex-A5 come to
>>> mind, so we should be aware that ARMCPU child<>s on the MPCore will l=
ead
>>> to asymmetry between SoCs.
>>
>> For the A8 and A5 the SoC object would just instantiate them
>> directly -- there's no equivalent in the hardware of the
>> "n CPUs and their private devices" layer. So I think
>> any asymmetry between SoCs in QEMU is just a reflection
>> of the differences in the hardware.
>>
>=20
> +1. Either you have an MPCore package as part of your soc or
> standalone CPU. Both are valid instantiables on the SoC level.

That's exactly what I said and PMM cut, so no argument here.

Andreas


--=20
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC=
rnberg