From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34798) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WwoyM-0000MC-Es for qemu-devel@nongnu.org; Tue, 17 Jun 2014 04:42:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WwoyG-0001sV-CS for qemu-devel@nongnu.org; Tue, 17 Jun 2014 04:42:30 -0400 Message-ID: <539FFF6D.2070407@suse.de> Date: Tue, 17 Jun 2014 10:42:21 +0200 From: Alexander Graf MIME-Version: 1.0 References: <5368D385.7050900@gmail.com> <536A51C9.6060308@gmail.com> <536A6683.2070500@suse.de> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] Help needed testing on ppc List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: BALATON Zoltan , qemu-devel@nongnu.org Cc: Programmingkid , qemu-ppc , =?ISO-8859-1?Q?Andreas_F=E4rber?= , Tom Musta On 17.06.14 01:42, BALATON Zoltan wrote: > On Thu, 12 Jun 2014, BALATON Zoltan wrote: >> On Wed, 7 May 2014, Alexander Graf wrote: >>> On 05/07/2014 05:31 PM, Tom Musta wrote: >>>> On 5/6/2014 6:17 PM, BALATON Zoltan wrote: >>>>> On Tue, 6 May 2014, Tom Musta wrote: >>>>>> (2) Your patch makes some store instructions compliant with the >>>>>> most recent ISAs but there are many other instructions that are >>>>>> not addressed by the patch. I think fixing only some will be a >>>>>> future source of confusion.>> >>>> Alex: do you have an opinion on this? Are you OK with changing >>>> masks for a few stores but not all instructions in general? >>> >>> I would like to see someone just test all those load/store >>> instructions on old CPUs and see whether they fault. If none faults, >>> we should just be consistent and remove them for all. If say a 750 >>> really only ignores the Rc bit for stwx for some reason we should >>> just model it accordingly. >> >> To get some answers to this and other questions that are still open >> I've made a test program by stripping down yaboot and adding tests to >> it so that it should be possible to run from Open Firmware as a boot >> loader. It can be found here: >> >> http://goliat.eik.bme.hu/~balaton/oftest/ >> >> The files there are: >> * oftest - an ELF executable that you can put on some device OF can read >> and run it if it were a boot loader ( e.g. 0> boot >> hd0,0:\oftest ) >> * oftest.hfs.xz - the same file on an 800k HFS volume that can be put on >> e.g. a USB drive or CD then used as the previous one >> * oftest-src.tar.xz - the source >> >> When run from Open Firmware it should print some information about >> memory layout, MSR setting, stack location, BAT registers and test >> the stwx opcode with and without reserved bit which should help us >> understand better the differences between QEMU and real hardware. I >> could only test it on QEMU though. > > I've got some results (but more are welcome) which can be seen here: > > http://goliat.eik.bme.hu/~balaton/oftest/results/ > > The results show that the stwx instruction with reserved bit set does > not change status bits and does not generate an exception on any CPU > tested (G3 and G4) so it is most probably just ignored as we thought. [adding qemu-ppc and tom to CC] Tom already commented on this. Is there a pattern that matches all the indexed load/store instructions or is stwx a one-off? Alex