From: "Andreas Färber" <afaerber@suse.de>
To: Eduardo Habkost <ehabkost@redhat.com>, qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
"Wang, Yong Y" <yong.y.wang@intel.com>,
"Dugger, Donald D" <donald.d.dugger@intel.com>
Subject: Re: [Qemu-devel] [PATCH] taget-i386: Broadwell CPU model
Date: Tue, 17 Jun 2014 22:34:16 +0200 [thread overview]
Message-ID: <53A0A648.800@suse.de> (raw)
In-Reply-To: <1403035900-31820-1-git-send-email-ehabkost@redhat.com>
"target"
Am 17.06.2014 22:11, schrieb Eduardo Habkost:
> This adds a new CPU model named "Broadwell". It has all the features
> from Haswell, plus PREFETCHW, RDSEED, ADX, SMAP.
>
> PREFETCHW was already supported as "3dnowprefetch".
>
> RDSEED, ADX was added on Linux v3.15-rc1.
>
> SMAP was added on Linux v3.15-rc2.
>
> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
> Cc: Wang, Yong Y <yong.y.wang@intel.com>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Dugger, Donald D <donald.d.dugger@intel.com>
> ---
> target-i386/cpu.c | 34 ++++++++++++++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 8983457..027a9b5 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -971,6 +971,40 @@ static X86CPUDefinition builtin_x86_defs[] = {
> .model_id = "Intel Core Processor (Haswell)",
> },
> {
> + .name = "Broadwell",
> + .level = 0xd,
> + .vendor = CPUID_VENDOR_INTEL,
> + .family = 6,
> + .model = 61,
> + .stepping = 2,
> + .features[FEAT_1_EDX] =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> + CPUID_DE | CPUID_FP87,
The indentation looks inconsistent (1 off), although I don't see a tab
character in the mix...
> + .features[FEAT_1_ECX] =
> + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
> + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
> + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
> + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
> + CPUID_EXT_PCID,
> + .features[FEAT_8000_0001_EDX] =
> + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
> + CPUID_EXT2_SYSCALL,
> + .features[FEAT_8000_0001_ECX] =
> + CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
> + .features[FEAT_7_0_EBX] =
> + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
> + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
> + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
> + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
> + CPUID_7_0_EBX_SMAP,
> + .xlevel = 0x8000000A,
> + .model_id = "Intel Core Processor (Broadwell)",
> + },
> + {
> .name = "Opteron_G1",
> .level = 5,
> .vendor = CPUID_VENDOR_AMD,
Apart from that, looks sane, so if someone can confirm the
Broadwell-specific values I'll be happy to fix the style and queue it
for 2.1.
Regards,
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
next prev parent reply other threads:[~2014-06-17 20:34 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-17 20:11 [Qemu-devel] [PATCH] taget-i386: Broadwell CPU model Eduardo Habkost
2014-06-17 20:34 ` Andreas Färber [this message]
2014-06-17 20:39 ` Eduardo Habkost
2014-06-17 22:57 ` Eduardo Habkost
2014-06-18 10:41 ` Paolo Bonzini
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