From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57355) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WxwkC-0002mV-V2 for qemu-devel@nongnu.org; Fri, 20 Jun 2014 07:12:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wxwk8-000050-58 for qemu-devel@nongnu.org; Fri, 20 Jun 2014 07:12:32 -0400 Received: from mail-we0-x22f.google.com ([2a00:1450:400c:c03::22f]:56832) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wxwk7-0008WE-Ud for qemu-devel@nongnu.org; Fri, 20 Jun 2014 07:12:28 -0400 Received: by mail-we0-f175.google.com with SMTP id k48so3654844wev.34 for ; Fri, 20 Jun 2014 04:12:27 -0700 (PDT) Sender: Paolo Bonzini Message-ID: <53A41718.6020808@redhat.com> Date: Fri, 20 Jun 2014 13:12:24 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1403259947-32233-1-git-send-email-james.hogan@imgtec.com> <20140620105837.GB12011@ohm.rr44.fr> In-Reply-To: <20140620105837.GB12011@ohm.rr44.fr> Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3] hw/mips: gt64xxx_pci: Add VMStateDescription List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno , James Hogan Cc: Sanjay Lal , qemu-devel@nongnu.org Il 20/06/2014 12:58, Aurelien Jarno ha scritto: > On Fri, Jun 20, 2014 at 11:25:47AM +0100, James Hogan wrote: >> From: Sanjay Lal >> >> Add VMStateDescription for GT64120 PCI emulation used by the Malta >> platform, to allow it to work with savevm/loadvm and live migration. >> >> The entire register array is saved/restored using VMSTATE_UINT32_ARRAY >> (fixed length GT_REGS = 1024). >> >> Signed-off-by: Sanjay Lal >> [james.hogan@imgtec.com: Convert to VMState] >> Signed-off-by: James Hogan >> Cc: Aurelien Jarno >> --- >> This is based on "[Patch 03/12] KVM/MIPS: Add save/restore state APIs >> for saving/restoring KVM guests."[1]. >> >> Changes in v3: >> - Save entire register array using VMSTATE_UINT32_ARRAY (which is fixed >> length of GT_REGS = 1024) rather than individual registers. This is >> safer in case an important register is missed or new emulated >> functionality is added. (Aurelien Jarno) >> >> Changes in v2: >> - Expand commit message >> - Convert to VMState (Peter Maydell) >> >> [1] https://lists.gnu.org/archive/html/qemu-devel/2013-03/msg00195.html >> --- >> hw/mips/gt64xxx_pci.c | 23 +++++++++++++++++++++++ >> 1 file changed, 23 insertions(+) >> >> diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c >> index 6398514c99d2..22f63ce0c8af 100644 >> --- a/hw/mips/gt64xxx_pci.c >> +++ b/hw/mips/gt64xxx_pci.c >> @@ -312,6 +312,27 @@ static void gt64120_pci_mapping(GT64120State *s) >> } >> } >> >> +static int gt64120_post_load(void *opaque, int version_id) >> +{ >> + GT64120State *s = opaque; >> + >> + gt64120_isd_mapping(s); >> + gt64120_pci_mapping(s); >> + >> + return 0; >> +} >> + >> +static const VMStateDescription vmstate_gt64120 = { >> + .name = "gt64120", >> + .version_id = 1, >> + .minimum_version_id = 1, >> + .post_load = gt64120_post_load, >> + .fields = (VMStateField[]) { >> + VMSTATE_UINT32_ARRAY(regs, GT64120State, GT_REGS), >> + VMSTATE_END_OF_LIST() >> + } >> +}; >> + >> static void gt64120_writel (void *opaque, hwaddr addr, >> uint64_t val, unsigned size) >> { >> @@ -1174,9 +1195,11 @@ static const TypeInfo gt64120_pci_info = { >> >> static void gt64120_class_init(ObjectClass *klass, void *data) >> { >> + DeviceClass *dc = DEVICE_CLASS(klass); >> SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); >> >> sdc->init = gt64120_init; >> + dc->vmsd = &vmstate_gt64120; >> } >> >> static const TypeInfo gt64120_info = { > > > Thanks for this new version, I'll apply it in the next days unless > someone comes with good arguments why we should not do that. > > Reviewed-by: Aurelien Jarno > FWIW it looks good to me. It's simpler this way. Paolo