Re: [Qemu-devel] [PATCH v2 13/22] target-mips: add Compact Branches

[Leon Alrae <leon.alrae@imgtec.com>]

On 11/06/2014 17:52, Richard Henderson wrote:
> On 06/11/2014 08:19 AM, Leon Alrae wrote:
>> +        case OPC_BEQZC:
>> +            tcg_gen_setcondi_tl(TCG_COND_EQ, bcond, t0, 0);
>> +            break;
> ...
>> +    /* Compact branches don't have delay slot, thus generating branch here */
>> +    /* TODO: implement forbidden slot */
>> +    gen_branch(ctx, 4);
> 
> This is not what I meant by generating a branch directly.
> 
> I meant generating
> 
>   tcg_gen_brcondi(TCG_COND_EQ, t0, 0, label)
> 
> instead of computing setcond into bcond and then branching off a comparison
> against bcond.

Ah, now I see.

> Consider creating some sort of structure that defines a condition for the
> translator, much like target-s390x does with struct DisasCompare or target-i386
> does with struct CCPrepare.
> 
> That lets "old" branches set up a condition based off bcond, and your new
> branches set up a condition based off the general registers (or brand new temps
> in the case of BOVC/BNVC).
> 
> The ability to select the TCG compare op also allows you to avoid things like
> the xor at the end of your BNVC computation.

My understanding is that this is a nice to have MIPS branch improvement
that can come later? I would prefer to avoid mixing this new work (which
also affects pre-R6 branches) into the current patchset. So I'm going
just to use tcg_gen_brcond in compact conditional branches directly as
you suggested initially.

Thanks,
Leon