From: Christopher Covington <cov@codeaurora.org>
To: Alistair Francis <alistair.francis@xilinx.com>
Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v1 7/7] target-arm: Call the pmccntr_sync function when swapping ELs
Date: Tue, 24 Jun 2014 11:55:23 -0400 [thread overview]
Message-ID: <53A99F6B.2080600@codeaurora.org> (raw)
In-Reply-To: <3217ac3f31ad96dd4811309d9a68e5af0886e628.1403572003.git.alistair.francis@xilinx.com>
On 06/23/2014 09:12 PM, Alistair Francis wrote:
> Call the new pmccntr_sync() function when there is a possibility
> of swapping ELs (I.E. when there is an exception)
>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> ---
>
> target-arm/helper-a64.c | 5 +++++
> target-arm/helper.c | 7 +++++++
> target-arm/op_helper.c | 6 ++++++
> 3 files changed, 18 insertions(+), 0 deletions(-)
>
> diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
> index 2b4ce6a..b61174f 100644
> --- a/target-arm/helper-a64.c
> +++ b/target-arm/helper-a64.c
> @@ -446,6 +446,8 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
> target_ulong addr = env->cp15.vbar_el[1];
> int i;
>
> + pmccntr_sync(env);
> +
> if (arm_current_pl(env) == 0) {
> if (env->aarch64) {
> addr += 0x400;
> @@ -484,6 +486,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
> addr += 0x100;
> break;
> default:
> + pmccntr_sync(env);
> cpu_abort(cs, "Unhandled exception 0x%x\n", cs->exception_index);
> }
>
> @@ -511,4 +514,6 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
>
> env->pc = addr;
> cs->interrupt_request |= CPU_INTERRUPT_EXITTB;
> +
> + pmccntr_sync(env);
> }
The double calls seem unwieldy. I think it could be made into a single
function call if there was access, perhaps as a second parameter or maybe as a
static variable, to both the previous and current state so the function could
tell whether there is no transition, enable->disable, or disable->enable.
Christopher
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux Foundation.
next prev parent reply other threads:[~2014-06-24 15:55 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-24 1:11 [Qemu-devel] [PATCH v1 0/7] target-arm: Extend PMCCNTR for ARMv8 Alistair Francis
2014-06-24 1:11 ` [Qemu-devel] [PATCH v1 1/7] target-arm: Make the ARM PMCCNTR register 64-bit Alistair Francis
2014-06-24 1:11 ` [Qemu-devel] [PATCH v1 2/7] target-arm: Implement PMCCNTR_EL0 and related registers Alistair Francis
2014-06-24 1:12 ` [Qemu-devel] [PATCH v1 3/7] target-arm: Add helper macros and defines for CCNT register Alistair Francis
2014-06-24 15:31 ` Christopher Covington
2014-06-24 22:40 ` Alistair Francis
2014-06-24 15:56 ` Peter Maydell
2014-06-24 22:42 ` Alistair Francis
2014-06-24 1:12 ` [Qemu-devel] [PATCH v1 4/7] target-arm: Implement pmccntr_sync function Alistair Francis
2014-06-24 15:35 ` Christopher Covington
2014-06-24 22:34 ` Alistair Francis
2014-06-24 1:12 ` [Qemu-devel] [PATCH v1 5/7] target-arm: Remove old code and replace with new functions Alistair Francis
2014-06-24 1:12 ` [Qemu-devel] [PATCH v1 6/7] target-arm: Implement pmccfiltr_write function Alistair Francis
2014-06-24 1:12 ` [Qemu-devel] [PATCH v1 7/7] target-arm: Call the pmccntr_sync function when swapping ELs Alistair Francis
2014-06-24 15:55 ` Christopher Covington [this message]
2014-06-24 22:39 ` Alistair Francis
2014-06-24 23:07 ` Peter Crosthwaite
2014-06-26 0:37 ` Alistair Francis
2014-06-26 11:40 ` Peter Crosthwaite
2014-06-26 11:43 ` Peter Crosthwaite
2014-06-26 14:58 ` [Qemu-devel] [PATCH v1 0/7] target-arm: Extend PMCCNTR for ARMv8 Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2014-06-26 5:06 [Qemu-devel] [PATCH v1 7/7] target-arm: Call the pmccntr_sync function when swapping ELs Alistair Francis
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