From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42795) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wzcwz-0003Er-AI for qemu-devel@nongnu.org; Tue, 24 Jun 2014 22:28:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wzcwu-0000Zc-6u for qemu-devel@nongnu.org; Tue, 24 Jun 2014 22:28:41 -0400 Received: from mga03.intel.com ([143.182.124.21]:37980) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wzcwu-0000ZN-0S for qemu-devel@nongnu.org; Tue, 24 Jun 2014 22:28:36 -0400 Message-ID: <53AA33C5.7060501@intel.com> Date: Wed, 25 Jun 2014 10:28:21 +0800 From: "Chen, Tiejun" MIME-Version: 1.0 References: <1403171631-3452-1-git-send-email-tiejun.chen@intel.com> <20140624025944.GJ1045@zhen-hp.sh.intel.com> In-Reply-To: <20140624025944.GJ1045@zhen-hp.sh.intel.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [Intel-gfx] [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Zhenyu Wang Cc: xen-devel@lists.xensource.com, airlied@linux.ie, daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, jani.nikula@linux.intel.com, qemu-devel@nongnu.org, dri-devel@lists.freedesktop.org On 2014/6/24 10:59, Zhenyu Wang wrote: > On 2014.06.19 17:53:51 +0800, Tiejun Chen wrote: >> Originally the reason to probe ISA bridge instead of Dev31:Fun0 >> is to make graphics device passthrough work easy for VMM, that >> only need to expose ISA bridge to let driver know the real >> hardware underneath. This is a requirement from virtualization >> team. Especially in that virtualized environments, XEN, there >> is irrelevant ISA bridge in the system with that legacy qemu >> version specific to xen, qemu-xen-traditional. So to work >> reliably, we should scan through all the ISA bridge devices >> and check for the first match, instead of only checking the >> first one. >> >> But actually, qemu-xen-traditional, is always enumerated with >> Dev31:Fun0, 00:1f.0 as follows: >> >> hw/pt-graphics.c: >> >> intel_pch_init() >> | >> + pci_isa_bridge_init(bus, PCI_DEVFN(0x1f, 0), ...); >> >> so this mean that isa bridge is still represented with Dev31:Func0 >> like the native OS. Furthermore, currently we're pushing VGA >> passthrough support into qemu upstream, and with some discussion, >> we wouldn't set the bridge class type and just expose this devfn. >> >> So we just go back to check devfn to make life normal. >> >> Signed-off-by: Tiejun Chen > > This was added historically when supporting graphics device passthrough. > Looks qemu upstream can't accept multiple ISA bridge and our PCH is always > on device 31: func0 as far as I know. Looks good to me. > > Reviewed-by: Zhenyu Wang > Thanks for your review. Do you know when this can be applied? Tiejun