From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50466) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wzo09-0004yp-Qr for qemu-devel@nongnu.org; Wed, 25 Jun 2014 10:16:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wzo02-0003Ow-CI for qemu-devel@nongnu.org; Wed, 25 Jun 2014 10:16:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:8021) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wzo01-0003Oh-U6 for qemu-devel@nongnu.org; Wed, 25 Jun 2014 10:16:34 -0400 Message-ID: <53AAD9AC.2010803@redhat.com> Date: Wed, 25 Jun 2014 16:16:12 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <53AA9480.1010005@intel.com> <53AA96DF.6070501@redhat.com> <53AA9B58.6050803@intel.com> <20140625095533.GE6357@redhat.com> <53AA9D79.3080003@redhat.com> <53AA9F3A.5030004@intel.com> <20140625102119.GJ6357@redhat.com> <53AABC81.2090206@redhat.com> <20140625134727.GB14578@redhat.com> <53AAD45A.5090905@redhat.com> <20140625141027.GE14578@redhat.com> In-Reply-To: <20140625141027.GE14578@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, stefano.stabellini@eu.citrix.com, allen.m.kay@intel.com, Kelly.Zytaruk@amd.com, qemu-devel@nongnu.org, anthony.perard@citrix.com, anthony@codemonkey.ws, yang.z.zhang@intel.com, "Chen, Tiejun" Il 25/06/2014 16:10, Michael S. Tsirkin ha scritto: > On Wed, Jun 25, 2014 at 03:53:30PM +0200, Paolo Bonzini wrote: >> Il 25/06/2014 15:47, Michael S. Tsirkin ha scritto: >>> OK, so how about doing this: either for the ISA >>> bridge, or for the VGA card itself: >>> >>> set subsystem vendor id to PCI_VENDOR_ID_XEN, >>> set subsystem device id to PCH device id >> >> That would work, but the same problem would then arise for the MCH. The >> driver there is banging at random places in the configuration space. >> >> This is why I asked for a solution that is future-proof, and since you can >> make one that works for both MCH and PCH it is nice to do the work just >> once. > > Q35 has MCH, so I don't see why we can't make that work, > extending it as appropriate. Is Q35's MCH configuration space entirely compatible with newer chipsets that are in the host and that the IGD driver expects? I dont think it's safe to assume that. > Doing that for PIIX is iffy. > Should we really do that? Q35 is there. Xen doesn't support Q35, and Q35 is still lacking migration. So it's really a chicken-and-egg problem. Paolo