From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60920) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0BCq-00053k-Uk for qemu-devel@nongnu.org; Thu, 26 Jun 2014 11:03:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X0BCk-0006oZ-Fm for qemu-devel@nongnu.org; Thu, 26 Jun 2014 11:03:20 -0400 Received: from mail-ie0-x22a.google.com ([2607:f8b0:4001:c03::22a]:65108) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0BCk-0006mX-5B for qemu-devel@nongnu.org; Thu, 26 Jun 2014 11:03:14 -0400 Received: by mail-ie0-f170.google.com with SMTP id tr6so3175320ieb.15 for ; Thu, 26 Jun 2014 08:03:13 -0700 (PDT) Message-ID: <53AC361F.7050306@gmail.com> Date: Thu, 26 Jun 2014 11:02:55 -0400 From: Etienne Martineau MIME-Version: 1.0 References: <53AB0C7C.1050805@gmail.com> <53AB1BDD.7080007@redhat.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] memory: memory_region_transaction_commit() slow List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: Paolo Bonzini , gonglei , Fam , "qemu-devel@nongnu.org Developers" On 14-06-25 11:52 PM, Peter Crosthwaite wrote: > On Thu, Jun 26, 2014 at 4:58 AM, Paolo Bonzini wrote: >> Il 25/06/2014 19:53, Etienne Martineau ha scritto: >> >>> >>> It seems to me that there is a scale issue O(n) in >>> memory_region_transaction_commit(). >>> >>> Basically the time it takes to rebuild the memory view during device >>> assignment >>> pci_bridge_update_mappings() increase linearly with respect to the number >>> of >>> device already assigned to the guest. >> >> >> That's correct, unfortunately. It can be fixed, it's not hard but also not >> trivial. >> >> Basically you can detect address spaces whose memory region is an alias of >> an address space's root memory region. You can then reuse that address >> space's FlatView instead of building another one. >> > > Sounds like my shareable address spaces scheme: > > http://lists.gnu.org/archive/html/qemu-devel/2014-06/msg00366.html > > Its not MR alias aware but shouldn't be too hard to extend. Would this help? > > Regards, > Peter > >> Paolo >> Hi Peter, I 'think' I understand what you are proposing. My problem is that a) I don't see how to covert pci_bridge to that PMA model and b) I'm not sure if this is going to address the issue I'm facing and if yes then how ? thanks, Etienne