From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57007) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0TC5-0001jo-8B for qemu-devel@nongnu.org; Fri, 27 Jun 2014 06:15:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X0TBy-0002yD-VJ for qemu-devel@nongnu.org; Fri, 27 Jun 2014 06:15:44 -0400 Received: from [59.151.112.132] (port=56307 helo=heian.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0TBx-0002xf-JM for qemu-devel@nongnu.org; Fri, 27 Jun 2014 06:15:38 -0400 Message-ID: <53AD4195.8050404@cn.fujitsu.com> Date: Fri, 27 Jun 2014 18:04:05 +0800 From: Gu Zheng MIME-Version: 1.0 References: <53AD4104.80701@cn.fujitsu.com> In-Reply-To: <53AD4104.80701@cn.fujitsu.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [RFC PATCH 2/3] qom/cpu: move register_vmstate to common CPUClass.realizefn List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Eduardo Habkost , tangchen , Yasuaki Ishimatsu , ChenFan , Igor Mammedov , =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Move cpu vmstate register from cpu_exec_init into cpu_common_realizefn, apic vmstate register into x86_cpu_apic_realize. And use the cc->get_arch_id as the instance id that suggested by Igor to fix the migration issue. Signed-off-by: Gu Zheng --- exec.c | 32 +++++++++++++++++++------------- hw/intc/apic_common.c | 3 +-- include/hw/i386/apic_internal.h | 3 ++- include/qom/cpu.h | 2 ++ qom/cpu.c | 2 ++ target-i386/cpu.c | 12 +++++++++--- 6 files changed, 35 insertions(+), 19 deletions(-) diff --git a/exec.c b/exec.c index 4e179a6..61ad996 100644 --- a/exec.c +++ b/exec.c @@ -468,10 +468,28 @@ void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as) } #endif +void cpu_vmstate_register(CPUState *cpu) +{ + CPUClass *cc = CPU_GET_CLASS(cpu); + int cpu_index = cc->get_arch_id(cpu); + + if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { + vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu); + } +#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY) + register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION, + cpu_save, cpu_load, cpu->env_ptr); + assert(cc->vmsd == NULL); + assert(qdev_get_vmsd(DEVICE(cpu)) == NULL); +#endif + if (cc->vmsd != NULL) { + vmstate_register(NULL, cpu_index, cc->vmsd, cpu); + } +} + void cpu_exec_init(CPUArchState *env) { CPUState *cpu = ENV_GET_CPU(env); - CPUClass *cc = CPU_GET_CLASS(cpu); CPUState *some_cpu; int cpu_index; @@ -494,18 +512,6 @@ void cpu_exec_init(CPUArchState *env) #if defined(CONFIG_USER_ONLY) cpu_list_unlock(); #endif - if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { - vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu); - } -#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY) - register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION, - cpu_save, cpu_load, env); - assert(cc->vmsd == NULL); - assert(qdev_get_vmsd(DEVICE(cpu)) == NULL); -#endif - if (cc->vmsd != NULL) { - vmstate_register(NULL, cpu_index, cc->vmsd, cpu); - } } #if defined(TARGET_HAS_ICE) diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index ce3d903..029f67d 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -345,7 +345,7 @@ static int apic_dispatch_post_load(void *opaque, int version_id) return 0; } -static const VMStateDescription vmstate_apic_common = { +const VMStateDescription vmstate_apic_common = { .name = "apic", .version_id = 3, .minimum_version_id = 3, @@ -391,7 +391,6 @@ static void apic_common_class_init(ObjectClass *klass, void *data) ICCDeviceClass *idc = ICC_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - dc->vmsd = &vmstate_apic_common; dc->reset = apic_reset_common; dc->props = apic_properties_common; idc->realize = apic_common_realize; diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h index 83e2a42..8a645cf 100644 --- a/include/hw/i386/apic_internal.h +++ b/include/hw/i386/apic_internal.h @@ -23,6 +23,7 @@ #include "exec/memory.h" #include "hw/cpu/icc_bus.h" #include "qemu/timer.h" +#include "migration/vmstate.h" /* APIC Local Vector Table */ #define APIC_LVT_TIMER 0 @@ -136,7 +137,7 @@ typedef struct VAPICState { } QEMU_PACKED VAPICState; extern bool apic_report_tpr_access; - +extern const VMStateDescription vmstate_apic_common; void apic_report_irq_delivered(int delivered); bool apic_next_timer(APICCommonState *s, int64_t current_time); void apic_enable_tpr_access_reporting(DeviceState *d, bool enable); diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 4b352a2..87eecd2 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -548,6 +548,8 @@ void cpu_interrupt(CPUState *cpu, int mask); #endif /* USER_ONLY */ +void cpu_vmstate_register(CPUState *cpu); + #ifdef CONFIG_SOFTMMU static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr, bool is_write, bool is_exec, diff --git a/qom/cpu.c b/qom/cpu.c index fada2d4..5158343 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -296,6 +296,8 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp) { CPUState *cpu = CPU(dev); + cpu_vmstate_register(cpu); + if (dev->hotplugged) { cpu_synchronize_post_init(cpu); notifier_list_notify(&cpu_added_notifiers, dev); diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 8983457..10f6d53 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2554,13 +2554,19 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp) static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) { - if (cpu->apic_state == NULL) { + DeviceState *apic_state = cpu->apic_state; + CPUClass *cc = CPU_GET_CLASS(CPU(cpu)); + + if (apic_state == NULL) { return; } - if (qdev_init(cpu->apic_state)) { + vmstate_register(0, cc->get_arch_id(CPU(cpu)), + &vmstate_apic_common, apic_state); + + if (qdev_init(apic_state)) { error_setg(errp, "APIC device '%s' could not be initialized", - object_get_typename(OBJECT(cpu->apic_state))); + object_get_typename(OBJECT(cpu->apic_state))); return; } } -- 1.7.7