From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44422) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0Xzz-0000TW-Ev for qemu-devel@nongnu.org; Fri, 27 Jun 2014 11:23:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X0Xzs-0005Vg-15 for qemu-devel@nongnu.org; Fri, 27 Jun 2014 11:23:35 -0400 Received: from mx1.redhat.com ([209.132.183.28]:23677) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0Xzr-0005VB-Q1 for qemu-devel@nongnu.org; Fri, 27 Jun 2014 11:23:27 -0400 Message-ID: <53AD8C6A.3040709@redhat.com> Date: Fri, 27 Jun 2014 11:23:22 -0400 From: John Snow MIME-Version: 1.0 References: <1403825329-21942-1-git-send-email-reza.jelveh@tuhh.de> In-Reply-To: <1403825329-21942-1-git-send-email-reza.jelveh@tuhh.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] ahci.c: mask the interrupt on complete flag to allow ahci.c to read the correct size for the PRDT List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Reza Jelveh Cc: qemu-devel@nongnu.org On 06/26/2014 07:28 PM, Reza Jelveh wrote: > +#define AHCI_PRDT_SIZE_MASK 0x3fffff > out of rampant curiosity, is there ever a case where the lower bits might be set and the mask 0x3fffc is not desirable, or can we always trust those bits to simply be off anyway?