Re: [Qemu-devel] [RFC PATCH] target-ppc: Add compatibility between P7/P7+ and P8E/P8

[Alexey Kardashevskiy <aik@ozlabs.ru>]

On 06/28/2014 10:00 AM, Alexey Kardashevskiy wrote:
> On 06/28/2014 02:14 AM, Alexander Graf wrote:
>>
>> On 27.06.14 17:54, Alexey Kardashevskiy wrote:
>>> At the moment POWER7+ and POWER7 CPUs are different incompatible
>>> families in QOM. The same is valid for POWER8E and POWER8 CPUs.
>>> However, these couples are architecturally equal and there is no
>>> good reason, for example, not to let run -cpu POWER7 on the real
>>> POWER7+ CPU machine.
>>>
>>> This introduces one more level in hierarchy of POWERPC CPU classes.
>>> New macro POWERPC_FAMILY_2 takes a family class and the parent family
>>> class and, for example, for POWER7+ the hierarchy looks like:
>>> TYPE_CPU
>>> TYPE_POWERPC_CPU
>>> POWER7-powerpc64-cpu
>>> POWER7+-powerpc64-cpu
>>>
>>> This registers new dynamic POWERPC CPU classes for all classes between
>>> the lowest one which matches the real PVR and TYPE_POWERPC_CPU.
>>> So for POWER7, it is still going to be just a single dynamic "POWER7"
>>> class but for POWER7+ inherited from POWER7 there are going to be
>>> 2 dynamic classes  - "POWER7+" and "POWER7" so management software
>>> can use both to ensure successful migration.
>>>
>>> Since POWER7+ inherits from POWER7 and POWER8E from POWER8, this
>>> removes recurring pieces of code. CPUs with shorter names were chosen
>>> as parents.
>>>
>>> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
>>> ---
>>>
>>> This is rather RFC patch and there is no hurry in reviewing this,
>>> and this is not 2.1 material and everyhting, just tried to solve
>>> a QOM puzzle here :)
>>
>> I'm not sure - I'd rather make sure we have this sorted out for 2.1 so we
>> can keep the -cpu list stable.
>>
>> Could we make the PVR matching a function callback rather than value+mask?
>> Then we could have p7 and p8 just match on 2 different PVR ranges.
> 
> POWER8:
>>>> bin(0x4d)
> '0b1001101'
>>>> bin(0x4b)
> '0b1001011'
>>>> bin(0x4c)
> '0b1001100'
> 
> 4D == POWER8, 4B == POWER8E, 4C - does not exist and when it will, I do not
> know what it is going to be.
> 
> POWER7:
>>>> bin(0x3f)
> '0b111111'
>>>> bin(0x4a)
> '0b1001010'
>>>>
> 
> 
> What should mask look like for P7 and P8?

Re-read your email :) Callback you say... And we will loose POWER7+ and
POWER8E. May it is all right as we drop bottom 16bits already...


-- 
Alexey