* [Qemu-devel] AHCI / Sata port initial error status
@ 2014-06-30 19:14 John Snow
2014-07-03 11:57 ` Alexander Graf
0 siblings, 1 reply; 2+ messages in thread
From: John Snow @ 2014-06-30 19:14 UTC (permalink / raw)
To: qemu-devel; +Cc: agraf
I am in the process of writing a series of AHCI tests (for q35) that
compare the written specifications against what the current device
emulation actually does, and I was curious about this bit instead of
ahci.c, in ahci_reset_port:
ide_state->error = 1;
What does this error signify, exactly, and why is it set by default on
ports with a device attached? It trickles up inside of the PxTFD.ERR
byte in the HBA as well as showing up in the initial Register D2H FIS
after the PxCMD.FRE bit is set.
Thank you,
--John.
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] AHCI / Sata port initial error status
2014-06-30 19:14 [Qemu-devel] AHCI / Sata port initial error status John Snow
@ 2014-07-03 11:57 ` Alexander Graf
0 siblings, 0 replies; 2+ messages in thread
From: Alexander Graf @ 2014-07-03 11:57 UTC (permalink / raw)
To: John Snow, qemu-devel
On 30.06.14 21:14, John Snow wrote:
> I am in the process of writing a series of AHCI tests (for q35) that
> compare the written specifications against what the current device
> emulation actually does, and I was curious about this bit instead of
> ahci.c, in ahci_reset_port:
>
> ide_state->error = 1;
>
> What does this error signify, exactly, and why is it set by default on
> ports with a device attached? It trickles up inside of the PxTFD.ERR
> byte in the HBA as well as showing up in the initial Register D2H FIS
> after the PxCMD.FRE bit is set.
I honestly don't remember :). We do unset the error bit once we get the
first working command though.
Alex
^ permalink raw reply [flat|nested] 2+ messages in thread
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