Re: [Qemu-devel] [PATCH 12/15] target-tricore: Add instructions of SBR opcode format

[Richard Henderson <rth@twiddle.net>]

On 07/07/2014 11:13 AM, Bastian Koppelmann wrote:
> Add instructions of SBR opcode format.
> Add gen_loop micro-op generator function.
> 
> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> ---
>  target-tricore/translate.c | 69 ++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 69 insertions(+)
> 
> diff --git a/target-tricore/translate.c b/target-tricore/translate.c
> index 69d99d3..5b11396 100644
> --- a/target-tricore/translate.c
> +++ b/target-tricore/translate.c
> @@ -281,6 +281,22 @@ static inline void gen_branch_condi(DisasContext *ctx, int cond, TCGv r1,
>      tcg_temp_free(temp);
>  }
>  
> +static void gen_loop(DisasContext *ctx, int r1, int32_t offset)
> +{
> +    int l1;
> +    l1 = gen_new_label();
> +
> +    tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr_a[r1], 0, l1);
> +    gen_save_pc(ctx->pc+offset);
> +    tcg_gen_subi_tl(cpu_gpr_a[r1], cpu_gpr_a[r1], 1);
> +    tcg_gen_exit_tb(0);
> +    gen_set_label(l1);
> +    gen_save_pc(ctx->pc+insn_bytes);
> +    tcg_gen_subi_tl(cpu_gpr_a[r1], cpu_gpr_a[r1], 1);
> +    tcg_gen_exit_tb(0);

Given that TCG does not register allocate over blocks, you're probably better
off subtracting first and comparing against -1, that way you don't need to keep
re-loading a[r1] from memory.

Again, goto_tb.

> +        gen_loop(ctx, r1, 0xffffffe0+(offset<<1));
> +        break;

I'd be happier seeing offset * 2 - 32.


r~