From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58255) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X4WeS-0000Wb-Na for qemu-devel@nongnu.org; Tue, 08 Jul 2014 10:45:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X4WeL-0000E4-Pe for qemu-devel@nongnu.org; Tue, 08 Jul 2014 10:45:48 -0400 Message-ID: <53BC0413.7060007@suse.de> Date: Tue, 08 Jul 2014 16:45:39 +0200 From: Alexander Graf MIME-Version: 1.0 References: <1401886265-6589-1-git-send-email-aik@ozlabs.ru> <1401886265-6589-31-git-send-email-aik@ozlabs.ru> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v5 30/30] spapr_hcall: Add address-translation-mode-on-interrupt resource in H_SET_MODE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , Alexey Kardashevskiy Cc: Tom Musta , "qemu-ppc@nongnu.org" , QEMU Developers , Greg Kurz On 08.07.14 16:37, Peter Maydell wrote: > On 4 June 2014 13:51, Alexey Kardashevskiy wrote: >> This adds handling of the RESOURCE_ADDR_TRANS_MODE resource from >> the H_SET_MODE, for POWER8 (PowerISA 2.07) only. >> >> This defines AIL flags for LPCR special register. >> >> This changes @excp_prefix according to the mode, takes effect in TCG. >> >> This turns support of a new capability PPC2_ISA207S flag for TCG. > I see this has hit master already, but: > >> +static target_ulong h_set_mode_resouce_addr_trans_mode(PowerPCCPU *cp= u, >> + target_ulong m= flags, >> + target_ulong v= alue1, >> + target_ulong v= alue2) > > "resource" has two 'r's in it. > >> +{ >> + CPUState *cs; >> + PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); >> + target_ulong prefix; >> + >> + if (!(pcc->insns_flags2 & PPC2_ISA207S)) { >> + return H_P2; >> + } >> + if (value1) { >> + return H_P3; >> + } >> + if (value2) { >> + return H_P4; >> + } >> + >> + switch (mflags) { >> + case H_SET_MODE_ADDR_TRANS_NONE: >> + prefix =3D 0; >> + break; >> + case H_SET_MODE_ADDR_TRANS_0001_8000: >> + prefix =3D 0x18000; >> + break; >> + case H_SET_MODE_ADDR_TRANS_C000_0000_0000_4000: >> + prefix =3D 0xC000000000004000; > Needs an ULL suffix to avoid warnings on 32 bit: > > /home/petmay01/linaro/qemu-from-laptop/qemu/hw/ppc/spapr_hcall.c: In > function =E2=80=98h_set_mode_resouce_addr_trans_mode=E2=80=99: > /home/petmay01/linaro/qemu-from-laptop/qemu/hw/ppc/spapr_hcall.c:773: > warning: integer constant is too large for =E2=80=98long=E2=80=99 type Wow, and there I thought I always catch those ;). Can you please quickly fix those up and commit then straight to the=20 tree? I don't think we'll have to do the usual commit dance for changes=20 as trivial as this. Alex