From: Richard Henderson <rth@twiddle.net>
To: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: Re: [Qemu-devel] [PATCH v2 10/15] target-tricore: Add instructions of SB opcode format
Date: Tue, 15 Jul 2014 08:31:50 -0700 [thread overview]
Message-ID: <53C54966.8010606@twiddle.net> (raw)
In-Reply-To: <1405359671-25985-11-git-send-email-kbastian@mail.uni-paderborn.de>
On 07/14/2014 10:41 AM, Bastian Koppelmann wrote:
> +static void gen_compute_branch(DisasContext *ctx, uint32_t opc,
> + int r1, int r2 , int32_t constant , int32_t offset)
> +{
> +
> + switch (opc) {
Watch whitespace, both vertical and horizontal here.
> +/* SB-format jumps */
> + case OPC1_16_SB_J:
> + case OPC1_32_B_J:
> + gen_goto_tb(ctx, 0, ctx->pc + offset * 2);
> + break;
> + case OPC1_16_SB_CALL:
> + gen_helper_1arg(call, ctx->next_pc);
> + gen_goto_tb(ctx, 0, ctx->pc + sextract32(offset, 0, 8) * 2);
Drop the sextract, since we've already done that...
> +/* SB-format */
> + case OPC1_16_SB_CALL:
> + case OPC1_16_SB_J:
> + case OPC1_16_SB_JNZ:
> + case OPC1_16_SB_JZ:
> + address = MASK_OP_SB_DISP8_SEXT(ctx->opcode);
> + gen_compute_branch(ctx, op1, 0, 0, 0, address);
... here.
r~
next prev parent reply other threads:[~2014-07-15 15:32 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-14 17:40 [Qemu-devel] [PATCH v2 00/15] TriCore architecture guest implementation Bastian Koppelmann
2014-07-14 17:40 ` [Qemu-devel] [PATCH v2 01/15] target-tricore: Add target stubs and qom-cpu Bastian Koppelmann
2014-07-14 17:40 ` [Qemu-devel] [PATCH v2 02/15] target-tricore: Add board for systemmode Bastian Koppelmann
2014-07-14 17:40 ` [Qemu-devel] [PATCH v2 03/15] target-tricore: Add softmmu support Bastian Koppelmann
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 04/15] target-tricore: Add initialization for translation and activate target Bastian Koppelmann
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 05/15] target-tricore: Add masks and opcodes for decoding Bastian Koppelmann
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 06/15] target-tricore: Add instructions of SRC opcode format Bastian Koppelmann
2014-07-14 21:05 ` Richard Henderson
2014-07-15 4:29 ` Bastian Koppelmann
2014-07-15 13:19 ` Bastian Koppelmann
2014-07-15 15:42 ` Richard Henderson
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 07/15] target-tricore: Add instructions of SRR " Bastian Koppelmann
2014-07-15 15:00 ` Richard Henderson
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 08/15] target-tricore: Add instructions of SSR " Bastian Koppelmann
2014-07-15 15:17 ` Richard Henderson
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 09/15] target-tricore: Add instructions of SRRS and SLRO " Bastian Koppelmann
2014-07-15 15:23 ` Richard Henderson
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 10/15] target-tricore: Add instructions of SB " Bastian Koppelmann
2014-07-15 15:31 ` Richard Henderson [this message]
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 11/15] target-tricore: Add instructions of SBC and SBRN " Bastian Koppelmann
2014-07-15 15:33 ` Richard Henderson
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 12/15] target-tricore: Add instructions of SBR " Bastian Koppelmann
2014-07-15 15:50 ` Richard Henderson
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 13/15] target-tricore: Add instructions of SC " Bastian Koppelmann
2014-07-15 15:56 ` Richard Henderson
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 14/15] target-tricore: Add instructions of SLR, SSRO and SRO " Bastian Koppelmann
2014-07-15 16:00 ` Richard Henderson
2014-07-14 17:41 ` [Qemu-devel] [PATCH v2 15/15] target-tricore: Add instructions of SR " Bastian Koppelmann
2014-07-15 16:50 ` Richard Henderson
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