From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57133) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X74i3-0004Ik-5I for qemu-devel@nongnu.org; Tue, 15 Jul 2014 11:32:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X74hu-0000vw-57 for qemu-devel@nongnu.org; Tue, 15 Jul 2014 11:32:03 -0400 Received: from mail-ie0-x236.google.com ([2607:f8b0:4001:c03::236]:39243) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X74hu-0000vl-0M for qemu-devel@nongnu.org; Tue, 15 Jul 2014 11:31:54 -0400 Received: by mail-ie0-f182.google.com with SMTP id y20so4705220ier.27 for ; Tue, 15 Jul 2014 08:31:53 -0700 (PDT) Sender: Richard Henderson Message-ID: <53C54966.8010606@twiddle.net> Date: Tue, 15 Jul 2014 08:31:50 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1405359671-25985-1-git-send-email-kbastian@mail.uni-paderborn.de> <1405359671-25985-11-git-send-email-kbastian@mail.uni-paderborn.de> In-Reply-To: <1405359671-25985-11-git-send-email-kbastian@mail.uni-paderborn.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 10/15] target-tricore: Add instructions of SB opcode format List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Bastian Koppelmann , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org On 07/14/2014 10:41 AM, Bastian Koppelmann wrote: > +static void gen_compute_branch(DisasContext *ctx, uint32_t opc, > + int r1, int r2 , int32_t constant , int32_t offset) > +{ > + > + switch (opc) { Watch whitespace, both vertical and horizontal here. > +/* SB-format jumps */ > + case OPC1_16_SB_J: > + case OPC1_32_B_J: > + gen_goto_tb(ctx, 0, ctx->pc + offset * 2); > + break; > + case OPC1_16_SB_CALL: > + gen_helper_1arg(call, ctx->next_pc); > + gen_goto_tb(ctx, 0, ctx->pc + sextract32(offset, 0, 8) * 2); Drop the sextract, since we've already done that... > +/* SB-format */ > + case OPC1_16_SB_CALL: > + case OPC1_16_SB_J: > + case OPC1_16_SB_JNZ: > + case OPC1_16_SB_JZ: > + address = MASK_OP_SB_DISP8_SEXT(ctx->opcode); > + gen_compute_branch(ctx, op1, 0, 0, 0, address); ... here. r~