From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43784) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XCkAI-0002Kw-9C for qemu-devel@nongnu.org; Thu, 31 Jul 2014 02:48:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XCkAC-0003ff-7X for qemu-devel@nongnu.org; Thu, 31 Jul 2014 02:48:38 -0400 Received: from cantor2.suse.de ([195.135.220.15]:60242 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XCkAC-0003fX-0e for qemu-devel@nongnu.org; Thu, 31 Jul 2014 02:48:32 -0400 Message-ID: <53D9E6BC.2070107@suse.de> Date: Thu, 31 Jul 2014 08:48:28 +0200 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <20140717110153.8352.80175.stgit@PASHA-ISP> <20140717110329.8352.10419.stgit@PASHA-ISP> In-Reply-To: <20140717110329.8352.10419.stgit@PASHA-ISP> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC PATCH v2 16/49] target: save cpu state fields List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Pavel Dovgalyuk , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, mark.burton@greensocs.com, real@ispras.ru, batuzovk@ispras.ru, Paolo Bonzini , fred.konrad@greensocs.com Am 17.07.2014 13:03, schrieb Pavel Dovgalyuk: > This patch adds interrupt fields to VMState for correct saving the CPU = state. >=20 > Signed-off-by: Pavel Dovgalyuk > --- > target-arm/machine.c | 5 ++++- > target-i386/machine.c | 5 ++++- > 2 files changed, 8 insertions(+), 2 deletions(-) >=20 > diff --git a/target-arm/machine.c b/target-arm/machine.c > index 3bcc7cc..29bfc10 100644 > --- a/target-arm/machine.c > +++ b/target-arm/machine.c > @@ -218,7 +218,7 @@ static int cpu_post_load(void *opaque, int version_= id) > =20 > const VMStateDescription vmstate_arm_cpu =3D { > .name =3D "cpu", > - .version_id =3D 20, > + .version_id =3D 21, > .minimum_version_id =3D 20, > .pre_save =3D cpu_pre_save, > .post_load =3D cpu_post_load, > @@ -259,6 +259,9 @@ const VMStateDescription vmstate_arm_cpu =3D { > VMSTATE_UINT64(env.exception.vaddress, ARMCPU), > VMSTATE_TIMER(gt_timer[GTIMER_PHYS], ARMCPU), > VMSTATE_TIMER(gt_timer[GTIMER_VIRT], ARMCPU), > + /* Fields required by replay */ > + VMSTATE_UINT32_V(parent_obj.interrupt_request, ARMCPU, 21), > + VMSTATE_INT32_V(parent_obj.exception_index, ARMCPU, 21), > VMSTATE_END_OF_LIST() > }, > .subsections =3D (VMStateSubsection[]) { > diff --git a/target-i386/machine.c b/target-i386/machine.c > index 16d2f6a..9dfac33 100644 > --- a/target-i386/machine.c > +++ b/target-i386/machine.c > @@ -605,7 +605,7 @@ static const VMStateDescription vmstate_msr_hyperv_= time =3D { > =20 > VMStateDescription vmstate_x86_cpu =3D { > .name =3D "cpu", > - .version_id =3D 12, > + .version_id =3D 13, > .minimum_version_id =3D 3, > .pre_save =3D cpu_pre_save, > .post_load =3D cpu_post_load, > @@ -702,6 +702,9 @@ VMStateDescription vmstate_x86_cpu =3D { > VMSTATE_UINT64_V(env.xcr0, X86CPU, 12), > VMSTATE_UINT64_V(env.xstate_bv, X86CPU, 12), > VMSTATE_YMMH_REGS_VARS(env.ymmh_regs, X86CPU, CPU_NB_REGS, 12)= , > + /* Fields required by replay */ > + VMSTATE_UINT32_V(parent_obj.interrupt_request, X86CPU, 13), > + VMSTATE_INT32_V(parent_obj.exception_index, X86CPU, 13), > VMSTATE_END_OF_LIST() > /* The above list is not sorted /wrt version numbers, watch ou= t! */ > }, Instead of messing with parent_obj here and above, can you please add common CPUState stuff to vmstate_cpu_common in exec.c? Regards, Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg