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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: Artyom Tarasenko <atar4qemu@gmail.com>, qemu-devel@nongnu.org
Cc: blauwirbel@gmail.com, rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH] target-sparc64: implement Short Floating-Point Store Instructions
Date: Sat, 09 Aug 2014 14:40:36 +0100	[thread overview]
Message-ID: <53E624D4.7040902@ilande.co.uk> (raw)
In-Reply-To: <6aae8f38cb28cb54df8348adc9d4c0aa1f0cd3d7.1407527535.git.atar4qemu@gmail.com>

On 08/08/14 21:48, Artyom Tarasenko wrote:

> Implement Short Floating-Point Store Instructions as described
> in the chapter 13.5.2 of UltraSPARC-IIi User's Manual.
>
> Particularly this instructions are used by NetBSD 4.0.1+ /sparc64
>
> Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
> ---
>
> With this patch applied on top of cmd646 patches it's possible to install
> and boot NetBSD 6.1.4 /sparc64.
>
>   target-sparc/ldst_helper.c | 15 ++++++++++++++-
>   1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
> index 03bd9f9..ca65e8d 100644
> --- a/target-sparc/ldst_helper.c
> +++ b/target-sparc/ldst_helper.c
> @@ -2154,7 +2154,6 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
>       unsigned int i;
>       target_ulong val;
>
> -    helper_check_align(env, addr, 3);
>       addr = asi_address_mask(env, asi, addr);
>
>       switch (asi) {
> @@ -2192,7 +2191,21 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
>           }
>
>           return;
> +    case 0xd2: /* 16-bit floating point load primary */
> +    case 0xd3: /* 16-bit floating point load secondary */
> +    case 0xda: /* 16-bit floating point load primary, LE */
> +    case 0xdb: /* 16-bit floating point load secondary, LE */
> +        helper_check_align(env, addr, 1);
> +        /* Fall through */
> +    case 0xd0: /* 8-bit floating point load primary */
> +    case 0xd1: /* 8-bit floating point load secondary */
> +    case 0xd8: /* 8-bit floating point load primary, LE */
> +    case 0xd9: /* 8-bit floating point load secondary, LE */
> +        val = env->fpr[rd/2].l.lower;
> +        helper_st_asi(env, addr, val, asi & 0x8d, ((asi & 2) >> 1) + 1);
> +        return;
>       default:
> +        helper_check_align(env, addr, 3);
>           break;
>       }

Great work! I can confirm that this does indeed allow NetBSD SPARC64 to 
boot in my tests here.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

I'd be happy to take this through my qemu-sparc tree if Richard/Blue can 
give a Reviewed-by.


ATB,

Mark.

  reply	other threads:[~2014-08-09 13:41 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-08 20:48 [Qemu-devel] [PATCH] target-sparc64: implement Short Floating-Point Store Instructions Artyom Tarasenko
2014-08-09 13:40 ` Mark Cave-Ayland [this message]
2014-08-12 17:40 ` Richard Henderson
2014-08-12 19:25   ` Artyom Tarasenko

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