From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39020) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XIMKg-0004vf-Rt for qemu-devel@nongnu.org; Fri, 15 Aug 2014 14:34:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XIMKT-0003vY-HF for qemu-devel@nongnu.org; Fri, 15 Aug 2014 14:34:34 -0400 Sender: Richard Henderson Message-ID: <53EE52A4.70806@twiddle.net> Date: Fri, 15 Aug 2014 08:34:12 -1000 From: Richard Henderson MIME-Version: 1.0 References: <1407785009-6538-1-git-send-email-tommusta@gmail.com> <1407785009-6538-2-git-send-email-tommusta@gmail.com> In-Reply-To: <1407785009-6538-2-git-send-email-tommusta@gmail.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 1/8] target-ppc: Bug Fix: rlwinm List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Tom Musta , qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: agraf@suse.de On 08/11/2014 09:23 AM, Tom Musta wrote: > The rlwinm specification includes the ROTL32 operation, which is defined > to be a left rotation of two copies of the least significant 32 bits of > the source GPR. > > The current implementation is incorrect on 64-bit implementations in that > it rotates a single copy of the least significant 32 bits, padding with > zeroes in the most significant bits. Yes, it does describe rotate_32 as a double-copy of the low 32 bits. But it also describes the mask as having "0 bits elsewhere". Thus, post mask, I don't see how you could distinguish the implementations. Have you an example that doesn't work with the current code? r~