From: Paolo Bonzini <pbonzini@redhat.com>
To: Eric Blake <eblake@redhat.com>, Markus Armbruster <armbru@redhat.com>
Cc: Juan Quintela <quintela@redhat.com>,
Alexey Kardashevskiy <aik@ozlabs.ru>,
Marcel Apfelbaum <marcel.a@redhat.com>,
Knut Omang <knut.omang@oracle.com>,
qemu-devel@nongnu.org, Gonglei <arei.gonglei@huawei.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
Igor Mammedov <imammedo@redhat.com>
Subject: Re: [Qemu-devel] [PATCH 2/3] ioh3420: Provide a unique bus name and an interrupt mapping function
Date: Thu, 21 Aug 2014 13:49:37 +0200 [thread overview]
Message-ID: <53F5DCD1.5050205@redhat.com> (raw)
In-Reply-To: <53F4E9D9.2050102@redhat.com>
Il 20/08/2014 20:32, Eric Blake ha scritto:
> On 08/20/2014 08:57 AM, Markus Armbruster wrote:
>> Paolo Bonzini <pbonzini@redhat.com> writes:
>>
>>> Il 20/08/2014 13:36, Michael S. Tsirkin ha scritto:
>>>>
>>>> For pci bridges, unless you set bus_name, bus name will
>>>> match device itself. See this code:
>>>>
>>>> * If we don't specify the name, the bus will be addressed as
>>>> * <id>.0, where id is the device id.
>>>> * Since PCI Bridge devices have a single bus each, we don't need
>>>> * the index:
>>>> * let users address the bus using the device name.
>>>> */
>>>> if (!br->bus_name && dev->qdev.id && *dev->qdev.id) {
>>>> br->bus_name = dev->qdev.id;
>>>> }
>>>
>>> Is libvirt using this rule? If not, I'd rather slash it since the
>>> <id>.0 name is shared with all other buses and not PCI-bridge-specific.
>>
>> br->bus_name is null unless pci_bridge_map_irq() set it. Only caller
>> for ioh3420 is ioh3420_init(), and that's dead code. Therefore,
>> br->bus_name is null here.
>>
>> Libvirt always sets a device ID. Slashing this this special case would
>> change the bus name from ID.0 to just ID. That'll break libvirt, as far
>> as I can tell from its source.
>
> Libvirt has had to deal with shenanigans like this before:
>
> http://libvirt.org/git/?p=libvirt.git;a=blob;f=src/qemu/qemu_capabilities.c;h=b758b5a0d4;hb=HEAD#l1982
While I applaud your attempts, I still maintain that it is pointless to
support anything but a very recent QEMU (let's say 2.0+ right now) for
non-x86 architecture.
I think that for q35 we should still be able to do modifications (and
perhaps should not even be providing backwards-compatible machine
types), but pci bridges affect piix4 too.
Paolo
next prev parent reply other threads:[~2014-08-21 11:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-20 6:53 [Qemu-devel] [PATCH 2/3] ioh3420: Provide a unique bus name and an interrupt mapping function Knut Omang
2014-08-20 8:52 ` Paolo Bonzini
2014-08-20 9:30 ` Knut Omang
2014-08-20 11:36 ` Michael S. Tsirkin
2014-08-20 13:08 ` Knut Omang
2014-08-20 13:20 ` Paolo Bonzini
2014-08-20 14:57 ` Markus Armbruster
2014-08-20 18:32 ` Eric Blake
2014-08-21 11:49 ` Paolo Bonzini [this message]
2014-08-20 12:06 ` Markus Armbruster
2014-08-20 12:33 ` Michael S. Tsirkin
2014-08-20 13:03 ` Markus Armbruster
2014-08-20 13:18 ` Paolo Bonzini
2014-08-20 14:28 ` Markus Armbruster
2014-08-20 11:49 ` Andreas Färber
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