From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46235) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XKsEH-0002yM-4d for qemu-devel@nongnu.org; Fri, 22 Aug 2014 13:02:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XKsE9-0004iS-F5 for qemu-devel@nongnu.org; Fri, 22 Aug 2014 13:02:21 -0400 Received: from mrs.ro ([109.74.194.28]:42911) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XKsE9-0004iN-9e for qemu-devel@nongnu.org; Fri, 22 Aug 2014 13:02:13 -0400 Message-ID: <53F77793.1080609@mrs.ro> Date: Fri, 22 Aug 2014 20:02:11 +0300 From: Valentin Manea MIME-Version: 1.0 References: <53F77740.5030200@mrs.ro> In-Reply-To: <53F77740.5030200@mrs.ro> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH v2 1/4] target-openrisc: Add IDE support to default machine List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "qemu-devel@nongnu.org" Cc: jia Liu Add MMIO ide device support to the default openrisc machine. Base address and IRQ line are the same as the or1ksim. Signed-off-by: Valentin Manea --- default-configs/or32-softmmu.mak | 3 +++ hw/openrisc/openrisc_sim.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/default-configs/or32-softmmu.mak b/default-configs/or32-softmmu.mak index cce4746..c3ff078 100644 --- a/default-configs/or32-softmmu.mak +++ b/default-configs/or32-softmmu.mak @@ -2,3 +2,6 @@ CONFIG_SERIAL=y CONFIG_OPENCORES_ETH=y +CONFIG_IDE_CORE=y +CONFIG_IDE_QDEV=y +CONFIG_IDE_MMIO=y diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index b2b4f9b..da8647f 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -24,9 +24,11 @@ #include "hw/char/serial.h" #include "net/net.h" #include "hw/loader.h" +#include "hw/ide.h" #include "exec/address-spaces.h" #include "sysemu/sysemu.h" #include "hw/sysbus.h" +#include "sysemu/blockdev.h" #include "sysemu/qtest.h" #define KERNEL_LOAD_ADDR 0x100 @@ -38,6 +40,32 @@ static void main_cpu_reset(void *opaque) cpu_reset(CPU(cpu)); } +static void openrisc_sim_ide_init(MemoryRegion *address_space, + hwaddr base, + hwaddr descriptors, + qemu_irq irq) +{ + DeviceState *dev; + SysBusDevice *busdev; + DriveInfo *dinfo; + + + dinfo = drive_get(IF_IDE, 0, 0); + if (!dinfo) { + return; + } + dev = qdev_create(NULL, "mmio-ide"); + busdev = SYS_BUS_DEVICE(dev); + sysbus_connect_irq(busdev, 0, irq); + qdev_prop_set_uint32(dev, "shift", 2); + qdev_init_nofail(dev); + memory_region_add_subregion(address_space, base, + sysbus_mmio_get_region(busdev, 0)); + memory_region_add_subregion(address_space, descriptors, + sysbus_mmio_get_region(busdev, 1)); + mmio_ide_init_drives(dev, dinfo, NULL); +} + static void openrisc_sim_net_init(MemoryRegion *address_space, hwaddr base, hwaddr descriptors, @@ -129,6 +157,10 @@ static void openrisc_sim_init(MachineState *machine) 0x92000400, cpu->env.irq[4], nd_table); } + /* Platform ATA device */ + openrisc_sim_ide_init(get_system_memory(), 0x9e000000, + 0x9e000100, cpu->env.irq[15]); + cpu_openrisc_load_kernel(ram_size, kernel_filename, cpu); } -- 1.9.1