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Date: Fri, 29 Aug 2014 12:28:06 +0800
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Subject: Re: [Qemu-devel] [question] e1000 interrupt storm
 happenedbecauseofitscorrespondingioapic->irr bit always set
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To: "Zhang, Yang Z" <yang.z.zhang@intel.com>, Zhang Haoyu <zhanghy@sangfor.com>, qemu-devel <qemu-devel@nongnu.org>, kvm <kvm@vger.kernel.org>, Gleb Natapov <gleb@kernel.org>, "Michael S.Tsirkin" <mst@redhat.com>

On 08/29/2014 12:07 PM, Zhang, Yang Z wrote:
> Zhang Haoyu wrote on 2014-08-29:
>> > Hi, Yang, Gleb, Michael,
>> > Could you help review below patch please?
> I don't quite understand the background. Why ioacpi->irr is setting before EOI? It should be driver's responsibility to clear the interrupt before issuing EOI.
>

This may happen when a interrupt was injected to guest when its irq
handler (driver) was not registered. So irr was still set even during
EOI broadcast, and then this irq will be injected to guest immediately.
This may cause a dead loop for guest who does not have the ability to
detect and disable interrupt storm.

This may be a bug of device model, but we want to know in real cpu, is
there a small time gap between the finish of EOI broadcast and the
interrupt raised by EOI? If yes, looks like KVM should emulate this
behaviour?

Thanks