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Subject: Re: [Qemu-devel] [PATCH 09/17] ppc: reorganize gen_compute_fprf
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To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Cc: dgibson@redhat.com, qemu-ppc@nongnu.org

On 8/28/2014 12:15 PM, Paolo Bonzini wrote:
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  target-ppc/translate.c | 22 ++++++++++------------
>  1 file changed, 10 insertions(+), 12 deletions(-)
> 
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index 0a85a23..afbd336 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -253,21 +253,19 @@ static inline void gen_compute_fprf(TCGv_i64 arg, int set_fprf, int set_rc)
>  {
>      TCGv_i32 t0 = tcg_temp_new_i32();
>  
> -    if (set_fprf != 0) {
> -        /* This case might be optimized later */
> -        tcg_gen_movi_i32(t0, 1);
> -        gen_helper_compute_fprf(t0, cpu_env, arg, t0);
> -        if (unlikely(set_rc)) {
> -            tcg_gen_mov_i32(cpu_crf[1], t0);
> -        }
> -        gen_helper_float_check_status(cpu_env);
> -    } else if (unlikely(set_rc)) {
> -        /* We always need to compute fpcc */
> -        tcg_gen_movi_i32(t0, 0);
> -        gen_helper_compute_fprf(t0, cpu_env, arg, t0);
> +    if (set_fprf == 0 && !set_rc) {
> +        return;
> +    }
> +
> +    tcg_gen_movi_i32(t0, set_fprf != 0);
> +    gen_helper_compute_fprf(t0, cpu_env, arg, t0);
> +    if (set_rc) {
>          tcg_gen_mov_i32(cpu_crf[1], t0);
>      }
>  
> +    if (set_fprf != 0) {
> +        gen_helper_float_check_status(cpu_env);
> +    }
>      tcg_temp_free_i32(t0);
>  }
>  
> 

This has a leak:

Opcode 3f 07 12 (fc00048e) leaked temporaries

I made this modification on top of your patch to fix it:

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 0911c18..ff9b966 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -251,12 +251,13 @@ static inline void gen_reset_fpstatus(void)

 static inline void gen_compute_fprf(TCGv_i64 arg, int set_fprf, int set_rc)
 {
-    TCGv_i32 t0 = tcg_temp_new_i32();
+    TCGv_i32 t0;

     if (set_fprf == 0 && !set_rc) {
         return;
     }

+    t0 = tcg_temp_new_i32();
     tcg_gen_movi_i32(t0, set_fprf != 0);
     gen_helper_compute_fprf(t0, cpu_env, arg, t0);
     if (set_rc) {