From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35792) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XQho4-0003Q0-Km for qemu-devel@nongnu.org; Sun, 07 Sep 2014 15:07:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XQhnv-0005tq-IX for qemu-devel@nongnu.org; Sun, 07 Sep 2014 15:07:24 -0400 Received: from mail-lb0-x22e.google.com ([2a00:1450:4010:c04::22e]:39153) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XQhnv-0005tj-8G for qemu-devel@nongnu.org; Sun, 07 Sep 2014 15:07:15 -0400 Received: by mail-lb0-f174.google.com with SMTP id n15so6083716lbi.19 for ; Sun, 07 Sep 2014 12:07:13 -0700 (PDT) Message-ID: <540CACDE.5020102@gmail.com> Date: Sun, 07 Sep 2014 22:07:10 +0300 From: Valentin Manea MIME-Version: 1.0 References: <53F704BE.6000407@mrs.ro> <5402DD88.5010600@gmail.com> In-Reply-To: <5402DD88.5010600@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] IDE: MMIO IDE device control should be little endian List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "qemu-devel@nongnu.org" Cc: kwolf@redhat.com, mjt@tls.msk.ru, Jia Liu , stefanha@redhat.com Hi, Did anybody get the chance to review this patch? It would be quite nice to integrate it before all the other openrisc changes, to get the IDE working also. Thanks, Valentin On 2014-08-31 11:32, Valentin Manea wrote: > > Set the IDE MMIO memory type to little endian. The ATA specs identify > words part of the control commands encoded as little endian. > While this has no impact on little endian systems, it's required for big > endian systems(eg OpenRisc). > > Signed-off-by: Valentin Manea > --- > hw/ide/mmio.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c > index 01c1d0e..334c8cc 100644 > --- a/hw/ide/mmio.c > +++ b/hw/ide/mmio.c > @@ -82,7 +82,7 @@ static void mmio_ide_write(void *opaque, hwaddr addr, > static const MemoryRegionOps mmio_ide_ops = { > .read = mmio_ide_read, > .write = mmio_ide_write, > - .endianness = DEVICE_NATIVE_ENDIAN, > + .endianness = DEVICE_LITTLE_ENDIAN, > }; > > static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr, > @@ -102,7 +102,7 @@ static void mmio_ide_cmd_write(void *opaque, hwaddr > addr, > static const MemoryRegionOps mmio_ide_cs_ops = { > .read = mmio_ide_status_read, > .write = mmio_ide_cmd_write, > - .endianness = DEVICE_NATIVE_ENDIAN, > + .endianness = DEVICE_LITTLE_ENDIAN, > }; > > static const VMStateDescription vmstate_ide_mmio = { >