From: Tom Musta <tommusta@gmail.com>
To: Pierre Mallard <mallard.pierre@gmail.com>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: agraf@suse.de
Subject: Re: [Qemu-devel] [PATCH 0/2] Enabling floating point instruction to 440x5 CPUs
Date: Fri, 12 Sep 2014 09:29:05 -0500 [thread overview]
Message-ID: <54130331.2070200@gmail.com> (raw)
In-Reply-To: <1410463065-4400-1-git-send-email-mallard.pierre@gmail.com>
On 9/11/2014 2:17 PM, Pierre Mallard wrote:
> This patch series enable floating point instruction in 440x5 CPUs
> which have the capabilities to have optional APU FPU in double precision mode.
>
> 1) Allow fc[tf]id[*] mnemonics for non TARGET_PPC64 with a new insn2 flag
> 2) Create a new 440x5 implementing floating point instructions
>
> Pierre Mallard (2):
> target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64
> target-ppc : Add new processor type 440x5wDFPU
>
> target-ppc/cpu-models.c | 3 +++
> target-ppc/cpu.h | 5 ++++-
> target-ppc/fpu_helper.c | 6 ------
> target-ppc/helper.h | 4 +---
> target-ppc/translate.c | 18 +++++++----------
> target-ppc/translate_init.c | 47 ++++++++++++++++++++++++++++++++++++++++---
> 6 files changed, 59 insertions(+), 24 deletions(-)
>
NIT: It is customary to version your patches so that we can all keep them straight. So "[V2 PATCH 0/2] ...". You can use the --subject-prefix option to git format-patch. I will defer to Alex on whether he wants you to resubmit.
next prev parent reply other threads:[~2014-09-12 14:29 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1410325413>
2014-09-11 19:17 ` [Qemu-devel] [PATCH 0/2] Enabling floating point instruction to 440x5 CPUs Pierre Mallard
2014-09-11 19:17 ` [Qemu-devel] [PATCH 1/2] target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64 Pierre Mallard
2014-09-12 14:28 ` Tom Musta
2014-09-12 14:40 ` Tom Musta
2014-09-12 14:56 ` Alexander Graf
2014-09-11 19:17 ` [Qemu-devel] [PATCH 2/2] target-ppc : Add new processor type 440x5wDFPU Pierre Mallard
2014-09-12 14:41 ` Tom Musta
2014-09-12 14:29 ` Tom Musta [this message]
2014-09-12 19:27 ` [Qemu-devel] [PATCH 0/2] Enabling floating point instruction to 440x5 CPUs Pierre Mallard
2014-09-12 19:31 ` [Qemu-devel] [PATCH v2 " Pierre Mallard
2014-09-12 19:31 ` [Qemu-devel] [PATCH v2 1/2] target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64 Pierre Mallard
2014-09-12 19:31 ` [Qemu-devel] [PATCH v2 2/2] target-ppc : Add new processor type 440x5wDFPU Pierre Mallard
2014-09-12 19:46 ` [Qemu-devel] [Qemu-ppc] [PATCH v2 0/2] Enabling floating point instruction to 440x5 CPUs Alexander Graf
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