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From: Richard Henderson <rth@twiddle.net>
To: Peter Maydell <peter.maydell@linaro.org>, Tom Musta <tommusta@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Alexander Graf <agraf@suse.de>
Subject: Re: [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes
Date: Tue, 16 Sep 2014 15:13:02 -0700	[thread overview]
Message-ID: <5418B5EE.5040500@twiddle.net> (raw)
In-Reply-To: <CAFEAcA8jcvSOv=Re3iwpkvEEJMqJJnKa5-2cAHEnqcDmRzM_tg@mail.gmail.com>

On 09/16/2014 11:49 AM, Peter Maydell wrote:
> On 16 September 2014 10:20, Tom Musta <tommusta@gmail.com> wrote:
>>
>>   1389      /* Compensate for very large offsets.  */
>>   1390      if (add_off >= 0x8000) {
>>   1391          /* Most target env are smaller than 32k; none are larger than 64k.
>>   1392             Simplify the logic here merely to offset by 0x7ff0, giving us a
>>   1393             range just shy of 64k.  Check this assumption.  */
>>   1394          QEMU_BUILD_BUG_ON(offsetof(CPUArchState,
>>   1395                                     tlb_table[NB_MMU_MODES - 1][1])
>>   1396                            > 0x7ff0 + 0x7fff);
>>   1397          tcg_out32(s, ADDI | TAI(TCG_REG_TMP1, base, 0x7ff0));
>>   1398          base = TCG_REG_TMP1;
>>   1399          cmp_off -= 0x7ff0;
>>   1400          add_off -= 0x7ff0;
>>   1401      }
> 
> Is it possible to promote this BUILD_BUG_ON from "only on
> PPC hosts" to "on all builds" ? It's really checking a
> property of the target CPU's code, not a property of
> the TCG backend, and I bet a lot of our backends don't
> get built very often so we could easily miss breakage.
> I guess you'd need to define and check a worst-case value
> in a common header somewhere.

Meh.  It is a property of the tcg backend, in that it is a property of the code
that immediately follows.  And that's what makes the BUG_ON clear and obvious, IMO.

For what it's worth, ppc as written has the smallest constraint of the current
backends, and I'm fairly confident that'll get built often-ish.

If you've got a rearrangement that puts the assert somewhere else, and keeps
the magic numbers understandable... I'll certainly have a look, but I don't see
how to retain the obviousness with a different placement.


r~

  reply	other threads:[~2014-09-16 22:13 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-15 15:03 [Qemu-devel] [PATCH v2 00/14] TCG ppc speedups Paolo Bonzini
2014-09-15 15:03 ` [Qemu-devel] [PATCH 01/14] ppc: do not look at the MMU index to detect PR/HV mode Paolo Bonzini
2014-09-15 15:03 ` [Qemu-devel] [PATCH 02/14] softmmu: support up to 12 MMU modes Paolo Bonzini
2014-09-15 15:03 ` [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes Paolo Bonzini
2014-09-16 17:20   ` Tom Musta
2014-09-16 18:02     ` Richard Henderson
2014-09-16 18:27       ` Paolo Bonzini
2014-09-16 18:41         ` Richard Henderson
2014-09-16 22:23           ` Richard Henderson
2014-09-17  6:22             ` Paolo Bonzini
2014-09-17  8:53               ` Paolo Bonzini
2014-09-17 15:33                 ` Richard Henderson
2014-09-17 15:50                   ` Paolo Bonzini
2014-09-17 15:55                     ` Richard Henderson
2014-09-16 18:49     ` Peter Maydell
2014-09-16 22:13       ` Richard Henderson [this message]
2014-09-15 15:03 ` [Qemu-devel] [PATCH 04/14] ppc: introduce ppc_get_cr and ppc_set_cr Paolo Bonzini
2014-09-18 19:24   ` Tom Musta
2014-09-15 15:03 ` [Qemu-devel] [PATCH 05/14] ppc: use CRF_* in fpu_helper.c Paolo Bonzini
2014-09-15 15:03 ` [Qemu-devel] [PATCH 06/14] ppc: introduce helpers for mfocrf/mtocrf Paolo Bonzini
2014-09-18 19:32   ` Tom Musta
2014-09-18 21:01   ` Richard Henderson
2014-09-15 15:03 ` [Qemu-devel] [PATCH 07/14] ppc: reorganize gen_compute_fprf Paolo Bonzini
2014-09-18 19:48   ` Tom Musta
2014-09-15 15:03 ` [Qemu-devel] [PATCH 08/14] ppc: introduce gen_op_mfcr/gen_op_mtcr Paolo Bonzini
2014-09-18 19:49   ` Tom Musta
2014-09-18 21:38   ` Richard Henderson
2014-09-19 13:31     ` Paolo Bonzini
2014-09-15 15:03 ` [Qemu-devel] [PATCH 09/14] ppc: introduce ppc_get_crf and ppc_set_crf Paolo Bonzini
2014-09-18 19:51   ` Tom Musta
2014-09-19 14:52     ` Paolo Bonzini
2014-09-15 15:03 ` [Qemu-devel] [PATCH 10/14] ppc: use movcond for isel Paolo Bonzini
2014-09-18 20:05   ` Tom Musta
2014-09-15 15:03 ` [Qemu-devel] [PATCH 11/14] ppc: store CR registers in 32 1-bit registers Paolo Bonzini
2014-09-18 20:25   ` Tom Musta
2014-09-19 13:53     ` Paolo Bonzini
2014-09-15 15:03 ` [Qemu-devel] [PATCH 12/14] ppc: use movcond to implement evsel Paolo Bonzini
2014-09-15 15:03 ` [Qemu-devel] [PATCH 13/14] ppc: inline ppc_set_crf when clearer Paolo Bonzini
2014-09-18 20:33   ` Tom Musta
2014-09-19 13:51     ` Paolo Bonzini
2014-09-15 15:03 ` [Qemu-devel] [PATCH 14/14] ppc: dump all 32 CR bits Paolo Bonzini
2014-09-18 20:43 ` [Qemu-devel] [PATCH v2 00/14] TCG ppc speedups Tom Musta
2014-09-19 15:16   ` Paolo Bonzini
2014-11-03 11:56 ` Alexander Graf

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