From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([2001:4830:134:3::10]:58396)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <pbonzini@redhat.com>) id 1XUyHT-0008Hl-HM
	for qemu-devel@nongnu.org; Fri, 19 Sep 2014 09:31:32 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <pbonzini@redhat.com>) id 1XUyHM-0005bR-V4
	for qemu-devel@nongnu.org; Fri, 19 Sep 2014 09:31:23 -0400
Received: from mx1.redhat.com ([209.132.183.28]:45393)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <pbonzini@redhat.com>) id 1XUyHM-0005aK-NN
	for qemu-devel@nongnu.org; Fri, 19 Sep 2014 09:31:16 -0400
Message-ID: <541C3015.8020800@redhat.com>
Date: Fri, 19 Sep 2014 15:31:01 +0200
From: Paolo Bonzini <pbonzini@redhat.com>
MIME-Version: 1.0
References: <1410793421-6453-1-git-send-email-pbonzini@redhat.com>
	<1410793421-6453-9-git-send-email-pbonzini@redhat.com>
	<541B50EC.3070803@twiddle.net>
In-Reply-To: <541B50EC.3070803@twiddle.net>
Content-Type: text/plain; charset=windows-1252
Content-Transfer-Encoding: 7bit
Subject: Re: [Qemu-devel] [PATCH 08/14] ppc: introduce
	gen_op_mfcr/gen_op_mtcr
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Richard Henderson <rth@twiddle.net>, qemu-devel@nongnu.org
Cc: tommusta@gmail.com, agraf@suse.de

Il 18/09/2014 23:38, Richard Henderson ha scritto:
> On 09/15/2014 08:03 AM, Paolo Bonzini wrote:
>> +static inline void gen_op_mfcr(TCGv_i32 dest, int first_cr, int shift)
>> +{
>> +    tcg_gen_shli_i32(dest, cpu_crf[first_cr >> 2], shift);
>> +}
>> +
>> +static inline void gen_op_mtcr(int first_cr, TCGv_i32 src, int shift)
>> +{
>> +    if (shift) {
>> +        tcg_gen_shri_i32(cpu_crf[first_cr >> 2], src, shift);
>> +        tcg_gen_andi_i32(cpu_crf[first_cr >> 2], cpu_crf[first_cr >> 2], 0x0F);
>> +    } else {
>> +        tcg_gen_andi_i32(cpu_crf[first_cr >> 2], src, 0x0F);
>> +    }
>> +}
> 
> Continuing on the name nit-picking, these *are* the mfocr and mtocr operations.

Ok, will swap.

Paolo