From: Richard Henderson <rth@twiddle.net>
To: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: Re: [Qemu-devel] [PATCH 5/5] target-tricore: Add instructions of BO opcode format
Date: Sat, 27 Sep 2014 23:17:59 -0700 [thread overview]
Message-ID: <5427A817.6060008@twiddle.net> (raw)
In-Reply-To: <1411829891-24866-6-git-send-email-kbastian@mail.uni-paderborn.de>
On 09/27/2014 07:58 AM, Bastian Koppelmann wrote:
> +/* ld circ */
> +DEF_HELPER_4(ld_b_circ, void, env, i32, i32, int)
Avoid, whenever possible, performing memory operations within helpers. Doing
that complicates the generation of correct code for exact exceptions from the
memory operation. I'm not saying it can't be done, but what you're doing right
now certainly isn't correct, and it's easier to do the memory operation with
tcg ops.
So now we need to find an efficient way to do this. In both cases, I think one
helper each for bit-reverse and circular modes should suffice.
E.g.
tcg_gen_ext16u_tl(temp, A[b+1])
tcg_gen_add_tl(ea, A[b], temp)
tcg_gen_qemu_ld_tl(ret, ea, mmu_idx, MO_UB)
gen_helper_br_update(A[b+1], A[b+1])
and then
uint32_t helper_br_update(uint32_t reg)
{
uint32_t index = reg & 0xffff;
uint32_t incr = reg >> 16;
uint32_t new_index = reverse16(reverse16(index) + reverse16(incr));
return reg - index + new_index;
}
uint32_t helper_circ_update(uint32_t reg, uint32_t off)
{
uint32_t index = reg & 0xffff;
uint32_t length = reg >> 16;
int32_t new_index = index + off;
if (new_index < 0) {
new_index += length;
} else {
new_index %= length;
}
return reg - index + new_index;
}
> +void helper_ld_w_circ(CPUTriCoreState *env, uint32_t r1, uint32_t r2, int off10)
> +{
> + CIRC_BR_DEFINES(r2)
> +
> + uint32_t ea0 = env->gpr_a[r2] + index;
> + uint32_t ea2 = env->gpr_a[r2] + (index + 2 % length_incr);
> +
> + uint32_t hw_ea2 = cpu_lduw_data(env, ea2) << 16;
> + uint32_t lw_ea0 = cpu_lduw_data(env, ea0);
> +
> + env->gpr_d[r1] = hw_ea2 | lw_ea0;
> +
> + CIRC_CALC_INDEX(r2, off10, length_incr);
> +}
I know that the volume 2 pseudo code for LD.W says two halfword loads, but the
volume 1 text, section 2.5.5 says that the buffer end must be aligned to the
size of the access. As I read it, two memory operations should not be required.
r~
prev parent reply other threads:[~2014-09-28 6:18 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-27 14:58 [Qemu-devel] [PATCH 0/5] Add TriCore ABS, ABSB, B, BIT, BO instructions Bastian Koppelmann
2014-09-27 14:58 ` [Qemu-devel] [PATCH 1/5] target-tricore: Cleanup and Bugfixes Bastian Koppelmann
2014-09-28 6:18 ` Richard Henderson
2014-09-27 14:58 ` [Qemu-devel] [PATCH 2/5] target-tricore: Add instructions of ABS, ABSB opcode format Bastian Koppelmann
2014-09-28 1:30 ` Richard Henderson
2014-09-27 14:58 ` [Qemu-devel] [PATCH 3/5] target-tricore: Add instructions of B " Bastian Koppelmann
2014-09-28 1:35 ` Richard Henderson
2014-09-27 14:58 ` [Qemu-devel] [PATCH 4/5] target-tricore: Add instructions of BIT " Bastian Koppelmann
2014-09-28 5:22 ` Richard Henderson
2014-09-28 12:05 ` Bastian Koppelmann
2014-09-28 13:27 ` Peter Maydell
2014-09-27 14:58 ` [Qemu-devel] [PATCH 5/5] target-tricore: Add instructions of BO " Bastian Koppelmann
2014-09-28 6:17 ` Richard Henderson [this message]
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