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Date: Tue, 14 Oct 2014 12:40:17 +0100
From: Leon Alrae <leon.alrae@imgtec.com>
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Subject: Re: [Qemu-devel] [PATCH v4 14/21] target-mips: add AUI,
 LSA and PCREL instruction families
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To: Yongbok Kim <yongbok.kim@imgtec.com>, qemu-devel@nongnu.org
Cc: james.hogan@imgtec.com, aurelien@aurel32.net, rth@twiddle.net

Hi Yongbok,

On 13/10/2014 14:37, Yongbok Kim wrote:
>> +    OPC_PCREL    = (0x3B << 26),
>> +};
>> +
>> +/* PC-relative address computation / loads  */
>> +#define MASK_OPC_PCREL_TOP2BITS(op)  (MASK_OP_MAJOR(op) | (op & (3 <<
>> 19)))
>> +#define MASK_OPC_PCREL_TOP5BITS(op)  (MASK_OP_MAJOR(op) | (op & (0x1f
>> << 16)))
> 
> There must be better name for this macro.
> It confused me that was looking like 31 and 30 bits.
> Just naming though...

TOP2BITS and TOP5BITS are referring to "TTTTT" bits. R6 PC-relative
family encoding: 111011.rs.TTTTT.imm16

Instructions:
111011.rs.00.<-----imm19> ADDIUPC
111011.rs.01.<----disp19> LWPC
111011.rs.10.<----disp19> LWUPC
111011.rs.110.<---disp18> LDPC
111011.rs.1110.<---imm17> reserved
111011.rs.11110.<--imm16> AUIPC
111011.rs.11111.<--imm16> ALUIPC

I couldn't come up with better name having reasonable length, any
suggestions are welcome.

Thanks,
Leon