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Date: Sun, 26 Oct 2014 13:06:47 +0100
From: Jan Kiszka <jan.kiszka@web.de>
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Subject: Re: [Qemu-devel] [PATCH 2/2] intel_iommu: Add support for
 translation for devices behind bridges.
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To: Knut Omang <knut.omang@oracle.com>, qemu-devel@nongnu.org
Cc: Marcel Apfelbaum <marcel.a@redhat.com>, Michael Tokarev <mjt@tls.msk.ru>, "Michael S. Tsirkin" <mst@redhat.com>, Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, Alexander Graf <agraf@suse.de>, Markus Armbruster <armbru@redhat.com>, =?ISO-8859-15?Q?Andreas_F=E4rber?= <andreas.faerber@web.de>, =?ISO-8859-15?Q?Herv=E9_Poussineau?= <hpoussin@reactos.org>, Anthony Liguori <aliguori@amazon.com>, Stefan Weil <sw@weilnetz.de>, qemu-ppc@nongnu.org, Richard Henderson <rth@twiddle.net>

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On 2014-10-21 00:34, Knut Omang wrote:
> @@ -65,11 +66,12 @@ struct VTDContextCacheEntry {
>  };
> =20
>  struct VTDAddressSpace {
> -    uint8_t bus_num;
> +    PCIDevice *dev;

This change is not helpful for clean handling of non-PCI devices (i.e.
platform device interrupt remapping =3D> you had to pull
Q35_PSEUDO_BUS_PLATFORM into intel_iommu, which is violating the
layering). Please leave bus_num in place - or convert to a 16-bit SID.

>      uint8_t devfn;
>      AddressSpace as;
>      MemoryRegion iommu;
>      IntelIOMMUState *iommu_state;
> +    QLIST_ENTRY(VTDAddressSpace) iommu_next; /* For traversal by the i=
ommu */
>      VTDContextCacheEntry context_cache_entry;
>  };
> =20

Jan



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