From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35076) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ximbe-0000ur-3X for qemu-devel@nongnu.org; Mon, 27 Oct 2014 11:53:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XimbV-0000hx-2c for qemu-devel@nongnu.org; Mon, 27 Oct 2014 11:53:18 -0400 Received: from mail-la0-x22d.google.com ([2a00:1450:4010:c03::22d]:60908) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XimbU-0000hr-QS for qemu-devel@nongnu.org; Mon, 27 Oct 2014 11:53:08 -0400 Received: by mail-la0-f45.google.com with SMTP id gm9so4614134lab.4 for ; Mon, 27 Oct 2014 08:53:07 -0700 (PDT) Sender: Paolo Bonzini Message-ID: <544E6A5D.5060406@redhat.com> Date: Mon, 27 Oct 2014 16:53:01 +0100 From: Paolo Bonzini MIME-Version: 1.0 References: <1414033363-31032-1-git-send-email-chao.p.peng@linux.intel.com> <20141023194923.GA25413@thinpad.lan.raisama.net> <20141024012716.GB3135@pengc-linux.bj.intel.com> <5449E9BE.9050900@redhat.com> <20141027154854.GA10848@thinpad.lan.raisama.net> In-Reply-To: <20141027154854.GA10848@thinpad.lan.raisama.net> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] target-i386: add Intel AVX-512 support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost Cc: kvm@vger.kernel.org, "Michael S. Tsirkin" , Marcelo Tosatti , qemu-devel@nongnu.org, Vadim Rozenfeld , Chao Peng , Laszlo Ersek , =?windows-1252?Q?Andreas_F=E4rber?= On 10/27/2014 04:48 PM, Eduardo Habkost wrote: > On Fri, Oct 24, 2014 at 07:55:10AM +0200, Paolo Bonzini wrote: > [...] >> I think we can keep the macros. The actual cleanup would be to have a >> single member for the 32 512-bit ZMM registers, instead of splitting >> xmm/ymmh/zmmh/zmm_hi16. This will get rid of the YMM_* and ZMM_* >> registers. However, we could not use simple memcpy()s to marshal in and >> out of the XSAVE data. We can do it in 2.2. > > Now, about the actual 2.3 plans: I believe the xmm/ymmh/zmmh/zmm_hi16 > separation actually makes the code simpler, because the only code > touching those registers inside QEMU is xsave/vmstate state > loading/saving, where the bits of the ZMM registers are split into > different sections/fields exactly in the same way. > > We can still eliminate the YMM_* and ZMM_* macros while keeping > xmm/ymmh/zmmh/zmm_hi16 as separate fields, and having a single zmm_regs > member would just add unnecessary complexity to the > XSAVE<->CPUX86State<->VMState translation code. > > (But if one day TCG starts implementing AVX or AVX512, then it may be > worthwhile to move the ZMM registers into a single field.) Yes, exactly---or even sooner, if we start dumping the 256 or 512 byte registers. I think the current separation of xmm/ymmh/zmmh/zmm_hi16 is a KVM-ism. Let's see what the patches look like, once they are ready. Paolo