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From: Damien Hilloulin <damien.hilloulin@epfl.ch>
To: Artyom Tarasenko <atar4qemu@gmail.com>
Cc: qemu-devel <qemu-devel@nongnu.org>, Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] Adding SMP support for Sparc Target
Date: Thu, 06 Nov 2014 18:36:42 +0100	[thread overview]
Message-ID: <545BB1AA.9020106@epfl.ch> (raw)
In-Reply-To: <CACXAS8AkLLU8gq32O7hdpEkt0ohR73SeBp4yJPzLpnvJcaeXVA@mail.gmail.com>

Le 06/11/2014 16:27, Artyom Tarasenko a écrit :
> Hello Damien,
>
> On Thu, Nov 6, 2014 at 8:38 AM, Damien Hilloulin
> <damien.hilloulin@epfl.ch> wrote:
>> Hello everyone,
>>
>> I'm a newcomer in QEMU and my goal would be to port an existing system
>> simulator using another emulator to QEMU.
>> Some work has already been done, and Sparc has been the main target so far
>> because of its simplicity (and because we have a very good support for Sparc
>> with the other emulator).
>> QEMU is great, open-source (contrary to the other emulator we have been
>> using in the past), and that's why we are aiming at using it.
>>
>> However, it seems that the Sparc targets doesn't really support SMP/CMT as
>> of now. So I am considering two possibilities:
>> - adding SMP support in QEMU for the Sparc targets (and contribute it to
>> QEMU :) )
> Do you mean a) emulating multiple guest cores on in a single host
> thread, or b) emulating multiple guest cores in multiple host threads?
a) Would be enough for us (but b) would be amazing) !
> The former (a) should be relative easy for a sun4m platform: just have
> to put the CPUs at the proper place in the system bus and fill the CPU
> Module Ids (MIDs) with the proper data.
Could you please explain it with some more details? I don't really know 
how to do that (yet)...
We are really interested in such a support for Sparc64, so I think that 
it would be for sun4u machines only.
Would the changes would be the same or would there be more work?

> It would bring no performance increase though. In fact the guest OS
> would likely run slower because the speed of an emulated CPU would
> decrease like 1/N, and utilization of multiple CPUs by a guest OS is
> probably scale like ~ log N, where N is the number of CPUs emulated.
>
> If you mean b), things get more complicated because TCG can currently
> utilize just one host thread. There was an attempt to do utilize
> multiple threads for an ARM target:
> http://sourceforge.net/p/coremu/home/Home
>
> It would be interesting to hear what the TCG experts would say. Adding
> Richard to CC.
>
> Artyom
>
Speeding up the simulation would be really interesting for us, but would 
be in the next iteration of changes. Would be great if we had both the 
features and speed :)

Thanks for your help, it seems really promising to me!

Damien.

  parent reply	other threads:[~2014-11-06 18:03 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-06  7:38 [Qemu-devel] Adding SMP support for Sparc Target Damien Hilloulin
2014-11-06 15:27 ` Artyom Tarasenko
2014-11-06 16:00   ` Alex Bennée
2014-11-06 17:36   ` Damien Hilloulin [this message]
2014-11-06 18:23     ` Artyom Tarasenko
2014-11-06 22:05       ` Damien Hilloulin
2014-11-07  8:05         ` Artyom Tarasenko
2014-11-07  8:19           ` Damien Hilloulin
2014-11-09  9:39       ` Mark Cave-Ayland

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