From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47039) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XmRPB-0002Wg-Us for qemu-devel@nongnu.org; Thu, 06 Nov 2014 13:03:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XmRP7-0003B6-Mw for qemu-devel@nongnu.org; Thu, 06 Nov 2014 13:03:33 -0500 Received: from smtp4.epfl.ch ([2001:620:618:1e0:1:80b2:e059:1]:55098) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XmRP7-0003Au-Cl for qemu-devel@nongnu.org; Thu, 06 Nov 2014 13:03:29 -0500 Message-ID: <545BB1AA.9020106@epfl.ch> Date: Thu, 06 Nov 2014 18:36:42 +0100 From: Damien Hilloulin MIME-Version: 1.0 References: <545B256F.8050008@epfl.ch> In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] Adding SMP support for Sparc Target List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Artyom Tarasenko Cc: qemu-devel , Richard Henderson Le 06/11/2014 16:27, Artyom Tarasenko a écrit : > Hello Damien, > > On Thu, Nov 6, 2014 at 8:38 AM, Damien Hilloulin > wrote: >> Hello everyone, >> >> I'm a newcomer in QEMU and my goal would be to port an existing system >> simulator using another emulator to QEMU. >> Some work has already been done, and Sparc has been the main target so far >> because of its simplicity (and because we have a very good support for Sparc >> with the other emulator). >> QEMU is great, open-source (contrary to the other emulator we have been >> using in the past), and that's why we are aiming at using it. >> >> However, it seems that the Sparc targets doesn't really support SMP/CMT as >> of now. So I am considering two possibilities: >> - adding SMP support in QEMU for the Sparc targets (and contribute it to >> QEMU :) ) > Do you mean a) emulating multiple guest cores on in a single host > thread, or b) emulating multiple guest cores in multiple host threads? a) Would be enough for us (but b) would be amazing) ! > The former (a) should be relative easy for a sun4m platform: just have > to put the CPUs at the proper place in the system bus and fill the CPU > Module Ids (MIDs) with the proper data. Could you please explain it with some more details? I don't really know how to do that (yet)... We are really interested in such a support for Sparc64, so I think that it would be for sun4u machines only. Would the changes would be the same or would there be more work? > It would bring no performance increase though. In fact the guest OS > would likely run slower because the speed of an emulated CPU would > decrease like 1/N, and utilization of multiple CPUs by a guest OS is > probably scale like ~ log N, where N is the number of CPUs emulated. > > If you mean b), things get more complicated because TCG can currently > utilize just one host thread. There was an attempt to do utilize > multiple threads for an ARM target: > http://sourceforge.net/p/coremu/home/Home > > It would be interesting to hear what the TCG experts would say. Adding > Richard to CC. > > Artyom > Speeding up the simulation would be really interesting for us, but would be in the next iteration of changes. Would be great if we had both the features and speed :) Thanks for your help, it seems really promising to me! Damien.