From: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, benh@au1.ibm.com, aik@au1.ibm.com,
qemu-devel@nongnu.org, paulus@samba.org
Subject: Re: [Qemu-devel] [PATCH v3 4/4] target-ppc: Handle ibm, nmi-register RTAS call
Date: Fri, 14 Nov 2014 13:54:24 +0530 [thread overview]
Message-ID: <5465BC38.6090106@linux.vnet.ibm.com> (raw)
In-Reply-To: <20141114004237.GD18600@voom.fritz.box>
On Friday 14 November 2014 06:12 AM, David Gibson wrote:
> On Thu, Nov 13, 2014 at 08:06:55PM +0530, Aravinda Prasad wrote:
>>
>>
>> On Thursday 13 November 2014 06:14 PM, David Gibson wrote:
>>> On Thu, Nov 13, 2014 at 05:18:16PM +0530, Aravinda Prasad wrote:
>>>> On Thursday 13 November 2014 04:02 PM, David Gibson wrote:
>>>>> On Thu, Nov 13, 2014 at 11:28:30AM +0530, Aravinda Prasad wrote:
>>> [snip]
>>>>>>>>> Having to retry the hcall from here seems very awkward. This is a
>>>>>>>>> private hcall, so you can define it to do whatever retries are
>>>>>>>>> necessary internally (and I don't think your current implementation
>>>>>>>>> can fail anyway).
>>>>>>>>
>>>>>>>> Retrying is required in the cases when multi-processors experience
>>>>>>>> machine check at or about the same time. As per PAPR, subsequent
>>>>>>>> processors should serialize and wait for the first processor to issue
>>>>>>>> the ibm,nmi-interlock call. The second processor retries if the first
>>>>>>>> processor which received a machine check is still reading the error log
>>>>>>>> and is yet to issue ibm,nmi-interlock call.
>>>>>>>
>>>>>>> Hmm.. ok. But I don't see any mechanism in the patches by which
>>>>>>> H_REPORT_MC_ERR will report failure if another CPU has an MC in
>>>>>>> progress.
>>>>>>
>>>>>> h_report_mc_err returns 0 if another VCPU is processing machine check
>>>>>> and in that case we retry. h_report_mc_err returns error log address if
>>>>>> no other VCPU is processing machine check.
>>>>>
>>>>> Uh.. how? I'm only seeing one return statement in the implementation
>>>>> in 3/4.
>>>>
>>>> This part is in 4/4 which handles ibm,nmi-interlock call in
>>>> h_report_mc_err()
>>>>
>>>> + if (mc_in_progress == 1) {
>>>> + return 0;
>>>> + }
>>>
>>> Ah, right, missed the change to h_report_mc_err() in the later patch.
>>>
>>>>>>>> Retrying cannot be done internally in h_report_mc_err hcall: only one
>>>>>>>> thread can succeed entering qemu upon parallel hcall and hence retrying
>>>>>>>> inside the hcall will not allow the ibm,nmi-interlock from first CPU to
>>>>>>>> succeed.
>>>>>>>
>>>>>>> It's possible, but would require some fiddling inside the h_call to
>>>>>>> unlock and wait for the other CPUs to finish, so yes, it might be more
>>>>>>> trouble than it's worth.
>>>>>>>
>>>>>>>>
>>>>>>>>>
>>>>>>>>>> + mtsprg 2,4
>>>>>>>>>
>>>>>>>>> Um.. doesn't this clobber the value of r3 you saved in SPRG2 just above.
>>>>>>>>
>>>>>>>> The r3 saved in SPRG2 is moved to rtas area in the private hcall and
>>>>>>>> hence it is fine to clobber r3 here
>>>>>>>
>>>>>>> Ok, if you're going to do some magic register saving inside the HCALL,
>>>>>>> why not do the SRR[01] and CR restoration inside there as well.
>>>>>>
>>>>>> SRR0/1 is clobbered while returning from HCALL and hence cannot be
>>>>>> restored in HCALL. For CR, we need to do the restoration here as we
>>>>>> clobber CR after returning from HCALL (the instruction checking the
>>>>>> return value of hcall clobbers CR).
>>>>>
>>>>> Hrm. AFAICT SRR0/1 shouldn't be clobbered when returning from an
>>>>
>>>> As hcall is an interrupt, SRR0 is set to nip and SRR1 to msr just before
>>>> executing rfid.
>>>
>>> AFAICT the return path from the hypervisor - including for hcalls -
>>> uses HSSR0/1 and hrfid, so ordinary SRR0/SRR1 should be ok.
>>
>> I see SRR0 and SRR1 clobbered when the HCALL from guest returns.
>> Previous discussions on this is in the link below:
>>
>> http://lists.nongnu.org/archive/html/qemu-devel/2014-09/msg01148.html
>
> Hrm. Well, I guess if it happened it happened, but Alex's explanation
> for why doesn't make sense to me.
>
> Did you execute cpu_synchronize_state() *before* attempting to set
> SRR0/1 in the hcall?
Yes I did.
>
>> Further I searched QEMU source code but could not find whether it is
>> using rfid/hrfid. However, ISA for sc instruction mentions that SRR0 and
>> SRR1 are modified.
>
> Well of course it isn't in the qemu source, the low-level return to
> guest is within the host kernel, specifically fast_guest_return in
> arch/powerpc/kvm/book3s_hv_rmhandlers.S which uses hrfid.
>
> If I'm reading the ISA correctly then yes, SRR0/1 are clobbered on
> entry, but that's on *entry* so can be overwritten by the hcall
> handler itself.
Hmm.. ok. I need to take a look into it in detail.
>
>
--
Regards,
Aravinda
next prev parent reply other threads:[~2014-11-14 8:25 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-05 7:12 [Qemu-devel] [PATCH v3 0/4] target-ppc: Add FWNMI support in qemu for powerKVM guests Aravinda Prasad
2014-11-05 7:12 ` [Qemu-devel] [PATCH v3 1/4] target-ppc: Extend rtas-blob Aravinda Prasad
2014-11-05 8:11 ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2014-11-05 8:46 ` Aravinda Prasad
2014-11-05 9:00 ` Alexander Graf
2014-11-05 9:07 ` Alexander Graf
2014-11-05 10:41 ` Aravinda Prasad
2014-11-05 7:12 ` [Qemu-devel] [PATCH v3 2/4] target-ppc: Register and handle HCALL to receive updated RTAS region Aravinda Prasad
2014-11-05 7:12 ` [Qemu-devel] [PATCH v3 3/4] target-ppc: Build error log Aravinda Prasad
2014-11-05 7:13 ` [Qemu-devel] [PATCH v3 4/4] target-ppc: Handle ibm, nmi-register RTAS call Aravinda Prasad
2014-11-05 8:32 ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2014-11-05 10:37 ` Aravinda Prasad
2014-11-05 11:07 ` Alexander Graf
2014-11-05 11:24 ` Aravinda Prasad
2014-11-05 11:27 ` Alexander Graf
2014-11-05 15:46 ` Tom Musta
2014-11-06 10:00 ` Aravinda Prasad
2014-11-06 10:29 ` Alexander Graf
2014-11-06 10:36 ` Aravinda Prasad
2014-11-11 3:19 ` David Gibson
2014-11-11 5:48 ` Aravinda Prasad
2014-11-11 6:11 ` David Gibson
2014-11-11 6:51 ` Aravinda Prasad
2014-11-11 11:30 ` David Gibson
2014-11-11 3:16 ` [Qemu-devel] " David Gibson
2014-11-11 6:44 ` Aravinda Prasad
2014-11-13 3:52 ` David Gibson
2014-11-13 5:58 ` Aravinda Prasad
2014-11-13 10:32 ` David Gibson
2014-11-13 11:48 ` Aravinda Prasad
2014-11-13 12:44 ` David Gibson
2014-11-13 14:36 ` Aravinda Prasad
2014-11-14 0:42 ` David Gibson
2014-11-14 8:24 ` Aravinda Prasad [this message]
2014-11-11 3:24 ` [Qemu-devel] [PATCH v3 0/4] target-ppc: Add FWNMI support in qemu for powerKVM guests David Gibson
2014-11-11 7:15 ` Aravinda Prasad
2014-11-13 3:57 ` David Gibson
2014-11-13 6:10 ` Aravinda Prasad
2014-11-19 5:48 ` Aravinda Prasad
2014-11-19 10:32 ` Alexander Graf
2014-11-19 11:44 ` David Gibson
2014-11-19 12:22 ` Alexander Graf
2014-11-19 12:42 ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2014-11-19 12:57 ` [Qemu-devel] " David Gibson
2015-04-02 4:28 ` [Qemu-devel] [Qemu-ppc] " Alexey Kardashevskiy
2015-04-02 4:46 ` David Gibson
2015-07-02 9:11 ` Alexey Kardashevskiy
2015-07-03 6:01 ` David Gibson
2015-07-08 8:28 ` Aravinda Prasad
2015-08-07 3:37 ` Sam Bobroff
2015-08-09 13:53 ` Alexander Graf
2015-08-10 4:05 ` Sam Bobroff
2015-09-01 11:07 ` Aravinda Prasad
2015-09-02 6:34 ` Sam Bobroff
2015-09-02 10:37 ` Aravinda Prasad
2015-09-02 23:53 ` David Gibson
2015-09-03 3:24 ` Sam Bobroff
2015-09-03 5:05 ` David Gibson
2015-09-03 5:18 ` Paul Mackerras
2015-09-03 6:22 ` Sam Bobroff
2015-09-03 18:30 ` Aravinda Prasad
2015-09-04 5:02 ` David Gibson
2015-09-04 5:01 ` David Gibson
2015-09-03 2:02 ` Paul Mackerras
2015-09-03 17:49 ` Aravinda Prasad
2015-09-01 6:21 ` Aravinda Prasad
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