From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52532) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XqKJ4-00019v-JL for qemu-devel@nongnu.org; Mon, 17 Nov 2014 06:17:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XqKIx-00050Z-6u for qemu-devel@nongnu.org; Mon, 17 Nov 2014 06:17:18 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:25835) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XqKIx-000506-1V for qemu-devel@nongnu.org; Mon, 17 Nov 2014 06:17:11 -0500 Message-ID: <5469D930.7000700@imgtec.com> Date: Mon, 17 Nov 2014 11:17:04 +0000 From: Leon Alrae MIME-Version: 1.0 References: In-Reply-To: Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] mips: Enable vectored interrupt support for the 74Kf CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Maciej W. Rozycki" , qemu-devel@nongnu.org Cc: Aurelien Jarno On 04/11/2014 15:42, Maciej W. Rozycki wrote: > Enable vectored interrupt support for the 74Kf CPU, reflecting hardware. > > Signed-off-by: Maciej W. Rozycki > --- > qemu-mips-config-74k-vint.diff > Index: qemu-git-trunk/target-mips/translate_init.c > =================================================================== > --- qemu-git-trunk.orig/target-mips/translate_init.c 2014-11-04 03:39:48.458972962 +0000 > +++ qemu-git-trunk/target-mips/translate_init.c 2014-11-04 03:43:15.479004225 +0000 > @@ -331,7 +331,7 @@ static const mips_def_t mips_defs[] = > (1 << CP0C1_CA), > .CP0_Config2 = MIPS_CONFIG2, > .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) | > - (0 << CP0C3_VInt), > + (1 << CP0C3_VInt), > .CP0_LLAddr_rw_bitmask = 0, > .CP0_LLAddr_shift = 4, > .SYNCI_Step = 32, > Reviewed-by: Leon Alrae