From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55063) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XqKSJ-0007qr-St for qemu-devel@nongnu.org; Mon, 17 Nov 2014 06:26:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XqKSF-0008EG-L9 for qemu-devel@nongnu.org; Mon, 17 Nov 2014 06:26:51 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:20798) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XqKSF-0008E6-FS for qemu-devel@nongnu.org; Mon, 17 Nov 2014 06:26:47 -0500 Message-ID: <5469DB75.6060606@imgtec.com> Date: Mon, 17 Nov 2014 11:26:45 +0000 From: Leon Alrae MIME-Version: 1.0 References: In-Reply-To: Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2] mips: Correct MIPS16/microMIPS branch size calculation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Maciej W. Rozycki" , qemu-devel@nongnu.org Cc: Aurelien Jarno On 07/11/2014 20:05, Maciej W. Rozycki wrote: > Correct MIPS16/microMIPS branch size calculation in PC adjustment > needed: > > - to set the value of CP0.ErrorEPC at the entry to the reset exception, > > - for the purpose of branch reexecution in the context of device I/O. > > Follow the approach taken in `exception_resume_pc' for ordinary, Debug > and NMI exceptions. > > MIPS16 and microMIPS branches can be 2 or 4 bytes in size and that has > to be reflected in calculation. Original MIPS ISA branches, which is > where this code originates from, are always 4 bytes long, just as all > original MIPS ISA instructions. > > Signed-off-by: Nathan Froyd > Signed-off-by: Maciej W. Rozycki > --- > Another change that has waited for too long, with the original > discussion archived here: > > http://lists.nongnu.org/archive/html/qemu-devel/2012-06/msg01230.html > > Resending with what hopefully is a better description and updated to > reflect the move of `cpu_io_recompile' from exec.c to translate-all.c. > > Please apply, > > Maciej > > qemu-mips-b16.diff > Index: qemu-git-trunk/target-mips/translate.c > =================================================================== > --- qemu-git-trunk.orig/target-mips/translate.c 2014-11-07 18:34:30.927788566 +0000 > +++ qemu-git-trunk/target-mips/translate.c 2014-11-07 18:34:35.428958223 +0000 > @@ -19452,7 +19452,8 @@ void cpu_state_reset(CPUMIPSState *env) > if (env->hflags & MIPS_HFLAG_BMASK) { > /* If the exception was raised from a delay slot, > come back to the jump. */ > - env->CP0_ErrorEPC = env->active_tc.PC - 4; > + env->CP0_ErrorEPC = (env->active_tc.PC > + - (env->hflags & MIPS_HFLAG_B16 ? 2 : 4)); > } else { > env->CP0_ErrorEPC = env->active_tc.PC; > } > Index: qemu-git-trunk/translate-all.c > =================================================================== > --- qemu-git-trunk.orig/translate-all.c 2014-11-07 17:33:13.037575065 +0000 > +++ qemu-git-trunk/translate-all.c 2014-11-07 18:34:35.428958223 +0000 > @@ -1534,7 +1534,7 @@ void cpu_io_recompile(CPUState *cpu, uin > branch. */ > #if defined(TARGET_MIPS) > if ((env->hflags & MIPS_HFLAG_BMASK) != 0 && n > 1) { > - env->active_tc.PC -= 4; > + env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); > cpu->icount_decr.u16.low++; > env->hflags &= ~MIPS_HFLAG_BMASK; > } > Reviewed-by: Leon Alrae